Patents by Inventor Alan Ellis

Alan Ellis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11283190
    Abstract: A fixed beam high gain antenna for generating high gain for satellite communication ground terminals includes a multi-layer PCB having a top surface forming a rear surface of the antenna and a bottom layer forming a front surface of the antenna; an antenna array including a plurality of antenna patches on the front surface of the antenna and a plurality of application-specific integrated circuits (ASICs) on the rear surface of the antenna; wherein the antenna array comprises at least one antenna unit cell each including one of the plurality of ASICs in connection with a corresponding plurality of the plurality of antenna patches; wherein each one of the plurality of ASICs is centrally positioned and surrounded by the corresponding plurality of antenna patches; and wherein a reduced length of the connection between each of the plurality of ASICs and the corresponding plurality of antenna patches minimizes RF transmission loss.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: March 22, 2022
    Assignee: AvL Technologies, Inc.
    Inventors: Ian J. Timmins, Keith Edenfield, Bruce Barratt, Alan Ellis
  • Patent number: 10993315
    Abstract: A compensated via structure is utilized in a multi-layer printed circuit board (PCB) stackup to improve the radio frequency (RF) transmission performance of the PCB. The compensated via structure includes a compensating structure and a central via surrounded by multiple grounding posts, wherein both ends of the central via are connected to the input and the output transmission lines through pads. The compensating structure is within a ground plane located in between of the two layers within which the input and output transmission lines are. The increased coupling between the central via and the grounding posts and between the compensating structure and the ground plane results in reductions in both return and insertion losses and contributes to the improved RF transmission performance.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: April 27, 2021
    Assignee: AvL Technologies, Inc.
    Inventors: Ian J. Timmins, Keith Edenfield, Bruce Barratt, Alan Ellis
  • Patent number: 10645840
    Abstract: A heatsink for heat dissipation amongst an active electronically steered array (AESA) on a printed circuit board (PCB) includes a metal plate having a first side and a second side; a plurality of integrally formed pockets on the first side of the metal plate each being sized and configured for congruent receipt of a corresponding one of a plurality of functional blocks of the AESA on the PCB; a plurality of waveguide manifolds on the second side of the metal plate including a plurality of holes that launch a wave transmission and a plurality of slots that guide the direction of the wave transmission; and wherein the metal plate prevents localized overheating amongst the AESA by positioning the metal plate on the PCB wherein the plurality of integrally formed pockets and the plurality of holes and the plurality of slots of the plurality of waveguide manifolds facilitate heat dissipation.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: May 5, 2020
    Assignee: AvL Technologies, Inc.
    Inventors: Ian J. Timmins, Wayne Holt, Alan Ellis, Adam C. Gropp, Keith Edenfield, Bruce Barratt
  • Publication number: 20190327855
    Abstract: A heatsink for heat dissipation amongst an active electronically steered array (AESA) on a printed circuit board (PCB) includes a metal plate having a first side and a second side; a plurality of integrally formed pockets on the first side of the metal plate each being sized and configured for congruent receipt of a corresponding one of a plurality of functional blocks of the AESA on the PCB; a plurality of waveguide manifolds on the second side of the metal plate including a plurality of holes that launch waveguide and a plurality of slots that guide the direction of the wave transmission; and wherein the metal plate prevents localized overheating amongst the AESA by positioning the metal plate on the PCB wherein the plurality of integrally formed pockets and the plurality of holes and the plurality of slots of the plurality of waveguide manifolds facilitate heat dissipation.
    Type: Application
    Filed: February 25, 2019
    Publication date: October 24, 2019
    Applicant: Optical Cable Corporation
    Inventors: Ian J. Timmins, Wayne Holt, Alan Ellis, Adam C. Grop, Keith Edenfield, Bruce Barratt
  • Publication number: 20190157772
    Abstract: A fixed beam high gain antenna for generating high gain for satellite communication ground terminals includes a multi-layer PCB having a top surface forming a rear surface of the antenna and a bottom layer forming a front surface of the antenna; an antenna array including a plurality of antenna patches on the front surface of the antenna and a plurality of application-specific integrated circuits (ASICs) on the rear surface of the antenna; wherein the antenna array comprises at least one antenna unit cell each including one of the plurality of ASICs in connection with a corresponding plurality of the plurality of antenna patches; wherein each one of the plurality of ASICs is centrally positioned and surrounded by the corresponding plurality of antenna patches; and wherein a reduced length of the connection between each of the plurality of ASICs and the corresponding plurality of antenna patches minimizes RF transmission loss.
    Type: Application
    Filed: November 5, 2018
    Publication date: May 23, 2019
    Applicant: AvL Technologies, Inc.
    Inventors: Ian J. Timmins, Keith Edenfield, Bruce Barratt, Alan Ellis
  • Publication number: 20190132943
    Abstract: A compensated via structure is utilized in a multi-layer printed circuit board (PCB) stackup to improve the radio frequency (RF) transmission performance of the PCB. The compensated via structure includes a compensating structure and a central via surrounded by multiple grounding posts, wherein both ends of the central via are connected to the input and the output transmission lines through pads. The compensating structure is within a ground plane located in between of the two layers within which the input and output transmission lines are. The increased coupling between the central via and the grounding posts and between the compensating structure and the ground plane results in reductions in both return and insertion losses and contributes to the improved RF transmission performance.
    Type: Application
    Filed: October 31, 2018
    Publication date: May 2, 2019
    Applicant: AvL Technologies, Inc.
    Inventors: Ian J. Timmins, Keith Edenfield, Bruce Barratt, Alan Ellis
  • Publication number: 20100200393
    Abstract: A sputter deposition method and system for producing a metal oxide film, especially a dielectric standoff layer of a thin film/nanolayer capacitor. A noble gas, such as argon, is used to sputter metal ions from a metal target, such as niobium, in the presence of a partial pressure of oxygen in a vacuum chamber. And an oxygen-to-noble gas flow ratio entering the vacuum chamber is controlled by a flow controller to be within an operating range defined between a predetermined lower limit (such as 30% O2/Ar for niobium oxide) associated with a minimum transparency/stoichiometric threshold and a predetermined upper limit (such as 80% O2/Ar for niobium oxide) associated with a maximum roughness/porosity threshold, so that a reaction between the sputtered metal ions and the oxygen produces a substantially transparent metal oxide film with a substantially smooth non-porous surface.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 12, 2010
    Inventors: Robert Chow, Alan Ellis
  • Publication number: 20050059311
    Abstract: A method of constructing a flexible panel display using gold as a conductive element and a matrix of carbon fibers as emitters is presented. The invention provides a novel defined pixel width of three emitter fibers per cell wherein each cell is positioned within three emulsion layers of suspended nano-crystals stack positioned vertically atop one-another. Each of these respective layers is excited by a single carbon fiber. In the preferred embodiment, fiber length ends from each cell are positioned at the mid-point of each respective polymer layer thickness and produce one of red, green, or blue colors required to complete the image formation.
    Type: Application
    Filed: June 18, 2004
    Publication date: March 17, 2005
    Inventor: Alan Ellis