Patents by Inventor Alan Folmsbee

Alan Folmsbee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7469344
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU with its operation modified. In order to execute program instructions, the buffer interdependencies must match that expected by the compiler. This makes analysis of the program operation extremely difficult. The instruction buffer on a keyed microprocessor contains logic which is able to route a subset of the instruction bits on the microprocessor. This selects destination logic gates in the microprocessor which eventually reach a programmable instruction decoder and an instruction buffer interdependency checking logic block.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: December 23, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 7353400
    Abstract: A CPU is provided with an ability to modify its operation, with respect to error correction, as a programmable feature. An error correction scheme is selected to be performed by the error correcting circuit. The compiled program may have intentionally introduced errors which are predictably corrected by the selected error correction scheme. When a program is compiled, the program is modified by the intentional insertion of errors which would result from the execution of the program. By providing error correction schema selected during program compilation, errors can be inserted in the program code, but are handled in a predictable manner by the error correction.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: April 1, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 7225322
    Abstract: A CPU executes program instructions which result in valid and invalid intermediate results. By selecting the desired intermediate results, a program is able to be successfully executed. Analysis of the intermediate results must avoid plausible wrong results. A programmable feature allows the instruction decoder to provide plural answers, including plausible wrong answers. Instruction output selection logic selects a predetermined buffer, and this permits further microprocessor operation with the correct intermediate result.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: May 29, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Publication number: 20050005157
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU with its operation modified. In order to execute program instructions, the buffer interdependencies must match that expected by the compiler. This makes analysis of the program operation extremely difficult. The instruction buffer on a keyed microprocessor contains logic which is able to route a subset of the instruction bits on the microprocessor. This selects destination logic gates in the microprocessor which eventually reach a programmable instruction decoder and an instruction buffer interdependency checking logic block.
    Type: Application
    Filed: May 21, 2004
    Publication date: January 6, 2005
    Applicant: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6757831
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU with its operation modified. In order to execute program instructions, the buffer interdependencies must match that expected by the compiler. This makes analysis of the program operation extremely difficult. The instruction buffer on a keyed microprocessor contains logic which is able to route a subset of the instruction bits on the microprocessor. This selects destination logic gates in the microprocessor which eventually reach a programmable instruction decoder and an instruction buffer interdependency checking logic block.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: June 29, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6675298
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed by the CPU with modified op codes. As a result, it is unnecessary to decrypt the program into standard op codes prior to execution. The modified op codes are provided with surplus bits, causing an increase in op code length, and the output of data results is provided in blocks of several words. The internal allocations of signals and logic gates is made key dependent to further foil the efforts of adversaries who may attempt to understand the program instructions.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: January 6, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6665796
    Abstract: A CPU executes program instructions which result in valid and invalid intermediate results. By selecting the desired intermediate results, a program is able to be successfully executed. Analysis of the intermediate results must avoid plausible wrong results. A programmable feature allows the instruction decoder to provide plural answers, including plausible wrong answers. Instruction output selection logic selects a predetermined buffer, and this permits further microprocessor operation with the correct intermediate result.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6609201
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU changes with respect to pipelined instruction routing. Logic on the CPU is able to route a subset of the register bits, and selects destination logic gates in the microprocessor in a manner consistent with a programmable instruction decoder. This in turn establishes an instruction buffer interdependency.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: August 19, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6598166
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key which is used to compile software to be executed on the CPU. When a program is compiled for the CPU, the program is modified in order that execution may be performed with the CPU having its operation modified to accommodate the encrypted format of the software. Logic architecture is able to shift the basic op code execution function, and the logic circuitry permits modifying operation of the microprocessor in accordance with logic instruction op codes stored in distributed memory locations. This logic circuitry is configurable in accordance with the received logic instructions during the execution of a program, and it is unnecessary to decrypt the program into standard op codes prior to execution.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: July 22, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6308256
    Abstract: A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that execution may be performed with the CPU with its operation modified. As a result, it is unnecessary to decrypt the program into standard op codes prior to execution. The keyed program operation permits secure transfer of program data through open channels such as the Internet. A programmable instruction decoder programmable decodes encrypted instruction op codes, without decrypting them into standard op codes. Logic is used to accomplish network handshaking. The network handshaking further used to provide additional key information for continued operation the CPU.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: October 23, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee