Patents by Inventor Alan G. Pezzulich

Alan G. Pezzulich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 3931574
    Abstract: This invention is directed to a test module for and method of testing integrated circuit connections (i.e., wire wrap, multilayer printed circuit boards, etc.) to determine whether or not the circuits are correctly wired and whether or not there are any short circuits or broken connections, as well as any other electrical problems. The system confirms the validity of the electrical interconnections by a visual comparison of the lighted light emitting diodes and the assembly plan; if the correct comparison is not made, an error in the manufacturing process is indicated. Failure of any of the expected light emitting diodes to light indicates missing or electrically bad connections; extra lighted light emitting diodes indicate extraneous connections or short circuits on the board.
    Type: Grant
    Filed: November 19, 1974
    Date of Patent: January 6, 1976
    Inventors: Ralph W. Curtis, Jr., William P. Byrne, Alan G. Pezzulich