Patents by Inventor Alan Ian Alpert

Alan Ian Alpert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for pre-verifying a computer instruction set to prevent the initiation of the execution of undefined instructions
    Patent number: 5925125
    Abstract: A Test Operation-Code (TSTOP) instruction pre-verifies the validity of a target instruction op-code prior to execution of the target instruction. The pre-verification function, contained within CPU execution unit microcode, sets a return value in a program status word to indicate one of four conditions:1. The target instruction is present and operable;2. The target instruction is present in the computer system, but unavailable on this central processor (e.g. an asymmetric feature).3. The target instruction is not present in this computer system.4. The TSTOP op-code is recognized, but the target instruction presence cannot be determined.The return value is testable by the program issuing the TSTOP instruction to determine whether the target instruction should be issued.
    Type: Grant
    Filed: June 24, 1993
    Date of Patent: July 20, 1999
    Assignee: International Business Machines Corporation
    Inventors: Alan Ian Alpert, Michael Gerard Mall
  • Method and apparatus for verifying a target instruction before execution of the target instruction using a test operation instruction which identifies the target instruction
    Patent number: 5640503
    Abstract: A Test Operation-Code (TSTOP) instruction pre-verifies the validity of a target instruction op-code prior to execution of the target instruction. The pre-verification function, contained within CPU execution unit microcode, sets a return value in a program status word to indicate one of four conditions:1. The target instruction is present and operable;2. The target instruction is present in the computer system, but unavailable on this central processor (e.g. an asymmetric feature).3. The target instruction is not present in this computer system.4. The TSTOP op-code is recognized, but the target instruction presence cannot be determined.The return value is testable by the program issuing the TSTOP instruction to determine whether the target instruction should be issued.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 17, 1997
    Assignee: International Business Machines Corporation
    Inventors: Alan Ian Alpert, Michael Gerard Mall