Patents by Inventor Alan J. Carlin
Alan J. Carlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10223486Abstract: A design verification system verifies an electronic device design based on a static model of the electronic device. The static model is an expression of the relationships between modules of the electronic device design and relationships between the behaviors of those modules that can be expressed as set of logical relationships. The static model does not rely on a time variable, but instead reflects a fixed set of relationships between the electronic device modules and between behaviors of the electronic device modules. The static model can be employed by a solver, that identifies whether or how the mathematical relationships of the static model can be reconciled, given a set of constraints. The solver results can be analyzed to identify whether there are errors in the device design, such as resource conflicts, failure of the design to achieve a desired configuration, and the like.Type: GrantFiled: November 13, 2013Date of Patent: March 5, 2019Assignee: NXP USA, Inc.Inventors: Hugo M. Cavalcanti, Alan J. Carlin, Huy Nguyen
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Patent number: 9495489Abstract: A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.Type: GrantFiled: June 2, 2014Date of Patent: November 15, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Alan J. Carlin, Hugo M. Cavalcanti, Jonathan W. McCallum, Huy Nguyen
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Publication number: 20150347645Abstract: A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.Type: ApplicationFiled: June 2, 2014Publication date: December 3, 2015Applicant: Freescale Semiconductor, Inc.Inventors: Alan J. Carlin, Hugo M. Cavalcanti, Jonathan W. McCallum, Huy Nguyen
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Patent number: 9104826Abstract: A design verification system automatically identifies coverage of different constraints for a static model of an electronic device. The static model can be employed by a tool, referred to as a solver, that identifies whether the mathematical relationships of the static model can be reconciled, given a set of user-defined constraints that indicate a desired configuration, or range of configurations, of the electronic device. After a solution for a particular set of user-defined constraints has been identified, a constraints adjustment module can identify, based on coverage information generated by the solver, if other sets of user-defined constraints were implicitly solved by the solver. If such other sets were implicitly solved, the adjustments module can mark the sets as solved, such that they will omitted from constraints used for subsequent solutions of the solver.Type: GrantFiled: November 13, 2013Date of Patent: August 11, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Huy Nguyen, Alan J. Carlin, Hugo M. Cavalcanti
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Publication number: 20150134305Abstract: A design verification system verifies an electronic device design based on a static model of the electronic device. The static model is an expression of the relationships between modules of the electronic device design and relationships between the behaviors of those modules that can be expressed as set of logical relationships. The static model does not rely on a time variable, but instead reflects a fixed set of relationships between the electronic device modules and between behaviors of the electronic device modules. The static model can be employed by a solver, that identifies whether or how the mathematical relationships of the static model can be reconciled, given a set of constraints. The solver results can be analyzed to identify whether there are errors in the device design, such as resource conflicts, failure of the design to achieve a desired configuration, and the like.Type: ApplicationFiled: November 13, 2013Publication date: May 14, 2015Applicant: FREESCALE SEMICONDUCTOR INC.Inventors: Hugo M. Cavalcanti, Alan J. Carlin, Huy Nguyen
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Publication number: 20150135149Abstract: A design verification system automatically identifies coverage of different constraints for a static model of an electronic device. The static model can be employed by a tool, referred to as a solver, that identifies whether the mathematical relationships of the static model can be reconciled, given a set of user-defined constraints that indicate a desired configuration, or range of configurations, of the electronic device. After a solution for a particular set of user-defined constraints has been identified, a constraints adjustment module can identify, based on coverage information generated by the solver, if other sets of user-defined constraints were implicitly solved by the solver. If such other sets were implicitly solved, the adjustments module can mark the sets as solved, such that they will omitted from constraints used for subsequent solutions of the solver.Type: ApplicationFiled: November 13, 2013Publication date: May 14, 2015Applicant: FREESCALE SEMICONDUCTOR INC.Inventors: Huy Nguyen, Alan J. Carlin, Hugo M. Cavalcanti
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Patent number: 7420401Abstract: An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes the resistor value to index to a configuration vector in a look-up table. The integrated circuit is then configured in accordance with the indexed configuration vector.Type: GrantFiled: June 14, 2006Date of Patent: September 2, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Colin MacDonald, Alan J. Carlin, Chris C. Dao
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Patent number: 7378993Abstract: A method and system for transmitting binary-coded data use partitioning of data words in a plurality of data nibbles. The data nibbles are coded using modified a 1-bit hot coding format that transforms a data nibble in a data segment including a plurality of bit groups. A change in a digital state at a bit position in a more significant bit group is maintained at that bit position in less significant bit groups, and information is transmitted in a form of a transition between digital states. The data segments are transmitted in phases each including one bit group from each data segment. At a receiving terminal, the bit groups are converted back in the binary-coded data words. In one application, the invention is used to reduce power consumption during data transmissions to and from an integrated circuit device.Type: GrantFiled: January 4, 2007Date of Patent: May 27, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Colin MacDonald, Alan J. Carlin, Donald L. Tietjen
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Publication number: 20070290731Abstract: An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes the resistor value to index to a configuration vector in a look-up table. The integrated circuit is then configured in accordance with the indexed configuration vector.Type: ApplicationFiled: June 14, 2006Publication date: December 20, 2007Inventors: Colin MacDonald, Alan J. Carlin, Chris C. Dao
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Patent number: 6624271Abstract: A process for making a solution of a copolymer of maleic anhydride (MA) and methyl vinyl ether (MVE) monomers the specific viscosity (SV) of the product being about 2.5-6, preferably 3-5, indicating a weight average molecular weight of substantially above one million, preferably above 1.5 million and a solids content of about 20-45%, preferably 30-40, in isopropyl acetate (IPAc), solvent includes the steps of (a) precharging part of MVE in IPAc into a reactor heated to about 50-90° C., and then (b) feeding (i) a solution of MA in IPAc, (ii) the rest of MVE, at a mole ratio of MA:MVE of 1:≧1.5 to 1:<3, preferably 1:2.4, and (iii) a free radical initiator dissolved in IPAc, in an amount of 0.02-0.3%, preferably 0.05-0.2%, based on total monomers, into the reactor over time. Powders of such MA/MVE copolymers are made by removing the solvent from the solution.Type: GrantFiled: November 26, 2002Date of Patent: September 23, 2003Assignee: ISP Investments Inc.Inventors: Yoon Tae Kwak, Stephen L. Kopolow, Alan J. Carlin
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Patent number: 5223567Abstract: There is described a process for the production of an ethanol solution of an ethyl or butyl half-ester copolymer of maleic anhydride and a methyl vinyl ether which comprises: (a) copolymerizing the monomers in acetone as solvent by simultaneously feeding molten maleic anhydride, a molar excess of methyl vinyl ether, and a solution of a free radical initiator in acetone, into a reactor precharged with acetone, at about 68.degree.-85.degree. C., preferably 70.degree.-80.degree. C.; (b) esterifying the acetone solution of said copolymer with ethanol or butanol; and then (c) solvent exchanging ethanol for acetone by continuously injecting vapors of ethanol at about 85.degree.-95.degree. C. into said copolymer solution while simultaneously distilling out acetone therefrom at atmospheric pressure.Type: GrantFiled: March 16, 1992Date of Patent: June 29, 1993Assignee: ISP Investments Inc.Inventors: John N. Zamora, Alan J. Carlin, Mohammed Tazi