Patents by Inventor Alan J. Miller
Alan J. Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220108875Abstract: A gas delivery system configured to provide deposition and etch gases to a processing chamber for a rapid alternating process includes a first valve arranged to provide deposition gas from a deposition gas manifold to a first zone of a gas distribution device via a first orifice and provide the deposition gas from the deposition gas manifold to a second zone of the gas distribution device via a second orifice having a diameters than the first orifice. A second valve is arranged to provide etch gas from the etch gas manifold to the first zone of the gas distribution device via a third orifice and provide the etch gas from the etch gas manifold to the second zone of the gas distribution device via a fourth orifice having a different diameter than the third orifice.Type: ApplicationFiled: January 23, 2020Publication date: April 7, 2022Inventors: William THIE, Jisoo KIM, Alan J. MILLER, Lai WEl, Frank Y. LIN, Jun Hee Hee HAN, Jie LIU, Conan CHlANG, Michael John MARTIN, Nicholas John CELESTE
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Patent number: 11112773Abstract: A cluster tool assembly includes a vacuum transfer module, a process module having a first side connected to the vacuum transfer module. An isolation valve having a first side and a second side, the first side of the isolation valve coupled to a second side of the process module. A replacement station is coupled to the second side of the isolation valve. The replacement station includes an exchange handler and a part buffer. The part buffer includes a plurality of compartments to hold new or used consumable parts. The process module includes a lift mechanism to enable placement of a consumable part installed in the process module to a raised position. The raised position provides access to the exchange handler to enable removal of the consumable part from the process module and store in a compartment of the part buffer. The exchange handler of the replacement station is configured to provide a replacement for the consumable part from the part buffer back to the process module.Type: GrantFiled: August 2, 2017Date of Patent: September 7, 2021Assignee: Lam Research CorporationInventors: David D. Trussell, Alan J. Miller, John Daugherty, Alex Paterson
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Publication number: 20180032062Abstract: A cluster tool assembly includes a vacuum transfer module, a process module having a first side connected to the vacuum transfer module. An isolation valve having a first side and a second side, the first side of the isolation valve coupled to a second side of the process module. A replacement station is coupled to the second side of the isolation valve. The replacement station includes an exchange handler and a part buffer. The part buffer includes a plurality of compartments to hold new or used consumable parts. The process module includes a lift mechanism to enable placement of a consumable part installed in the process module to a raised position. The raised position provides access to the exchange handler to enable removal of the consumable part from the process module and store in a compartment of the part buffer. The exchange handler of the replacement station is configured to provide a replacement for the consumable part from the part buffer back to the process module.Type: ApplicationFiled: August 2, 2017Publication date: February 1, 2018Inventors: David D. Trussell, Alan J. Miller, John Daugherty, Alex Paterson
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Publication number: 20170115657Abstract: A cluster tool assembly includes a vacuum transfer module, a process module having a first side connected to the vacuum transfer module. An isolation valve having a first side and a second side, the first side of the isolation valve coupled to a second side of the process module. A replacement station is coupled to the second side of the isolation valve. The replacement station includes an exchange handler and a part buffer. The part buffer includes a plurality of compartments to hold new or used consumable parts. The process module includes a lift mechanism to enable placement of a consumable part installed in the process module to a raised position. The raised position provides access to the exchange handler to enable removal of the consumable part from the process module and store in a compartment of the part buffer. The exchange handler of the replacement station is configured to provide a replacement for the consumable part from the part buffer back to the process module.Type: ApplicationFiled: October 22, 2015Publication date: April 27, 2017Inventors: David D. Trussell, Alan J. Miller, John Daugherty, Alex Paterson
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Patent number: 8871105Abstract: A method is provided for etching silicon in a plasma processing chamber, having an operating pressure and an operating bias. The method includes: performing a first vertical etch in the silicon to create a hole having a first depth and a sidewall; performing a deposition of a protective layer on the sidewall; performing a second vertical etch to deepen the hole to a second depth and to create a second sidewall, the second sidewall including a first trough, a second trough and a peak, the first trough corresponding to the first sidewall, the second trough corresponding to the second sidewall, the peak being disposed between the first trough and the second trough; and performing a third etch to reduce the peak.Type: GrantFiled: March 9, 2012Date of Patent: October 28, 2014Assignee: Lam Research CorporationInventors: Jaroslaw W. Winniczek, Frank Y. Lin, Alan J. Miller, Qing Xu, Seongjun Heo, Jin Hwan Ham, Sang Joon Yoon, Camelia Rusu
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Patent number: 8609548Abstract: A method for etching features into an etch layer in a plasma processing chamber, comprising a plurality of cycles is provided. Each cycle comprises a deposition phase and an etching phase. The deposition phase comprises providing a flow of deposition gas, forming a plasma from the deposition gas in the plasma processing chamber, providing a first bias during the deposition phase to provide an anisotropic deposition, and stopping the flow of the deposition gas into the plasma processing chamber. The etching phase, comprises providing a flow of an etch gas, forming a plasma from the etch gas in the plasma processing chamber, providing a second bias during the etch phase, wherein the first bias is greater than the second bias, and stopping the flow of the etch gas into the plasma processing chamber.Type: GrantFiled: July 21, 2011Date of Patent: December 17, 2013Assignee: Lam Research CorporationInventors: Qing Xu, Camelia Rusu, Jaroslaw W. Winniczek, Frank Y. Lin, Alan J. Miller
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Publication number: 20130237062Abstract: A method is provided for etching silicon in a plasma processing chamber, having an operating pressure and an operating bias. The method includes: performing a first vertical etch in the silicon to create a hole having a first depth and a sidewall; performing a deposition of a protective layer on the sidewall; performing a second vertical etch to deepen the hole to a second depth and to create a second sidewall, the second sidewall including a first trough, a second trough and a peak, the first trough corresponding to the first sidewall, the second trough corresponding to the second sidewall, the peak being disposed between the first trough and the second trough; and performing a third etch to reduce the peak.Type: ApplicationFiled: March 9, 2012Publication date: September 12, 2013Inventors: Jaroslaw W. Winniczek, Frank Y. Lin, Alan J. Miller, Qing Xu, Seongjun Heo, Jin Hwan Ham, Sang Joon Yoon, Camelia Rusu
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Publication number: 20120309194Abstract: A method for etching features into an etch layer in a plasma processing chamber, comprising a plurality of cycles is provided. Each cycle comprises a deposition phase and an etching phase. The deposition phase comprises providing a flow of deposition gas, forming a plasma from the deposition gas in the plasma processing chamber, providing a first bias during the deposition phase to provide an anisotropic deposition, and stopping the flow of the deposition gas into the plasma processing chamber. The etching phase, comprises providing a flow of an etch gas, forming a plasma from the etch gas in the plasma processing chamber, providing a second bias during the etch phase, wherein the first bias is greater than the second bias, and stopping the flow of the etch gas into the plasma processing chamber.Type: ApplicationFiled: July 21, 2011Publication date: December 6, 2012Applicant: LAM RESEARCH CORPORATIONInventors: Qing Xu, Camelia Rusu, Jaroslaw W. Winniczek, Frank Y. Lin, Alan J. Miller
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Patent number: 7682980Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.Type: GrantFiled: January 25, 2007Date of Patent: March 23, 2010Assignee: Lam Research CorporationInventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller, Saurabh Ullal, Harmeet Singh
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Patent number: 7605063Abstract: Methods of processing a substrate so as to protect an active area include positioning a substrate in an inductively coupled plasma processing chamber, supplying process gas to the chamber, generating plasma from the process gas and processing the substrate so as to protect the active area by maintaining a plasma potential of about 5 to 15 volts at the substrate surface and/or passivating the active area by using a siliane-free process gas including at least one additive effective to form a protective layer on the active area of the substrate wherein the protective layer includes at least one element from the additive which is already present in the active area.Type: GrantFiled: May 10, 2006Date of Patent: October 20, 2009Assignee: Lam Research CorporationInventors: Robert P. Chebi, Jaroslaw W. Winniczek, Alan J. Miller, Gladys S. Lo
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Patent number: 7186661Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.Type: GrantFiled: June 27, 2003Date of Patent: March 6, 2007Assignee: Lam Research CorporationInventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller, Saurabh Ullal, Harmeet Singh
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Patent number: 7098141Abstract: A semiconductor manufacturing process provides a shallow trench in a silicon layer using a silicon containing etch gas to provide controlled top and/or bottom rounding of the trench or to enhance profile control and/or critical dimension control by controlled deposition across a semiconductor substrate. A gate structure can be etched on a semiconductor substrate using a silicon containing gas to enhance profile control and/or critical dimension control.Type: GrantFiled: March 3, 2003Date of Patent: August 29, 2006Assignee: Lam Research CorporationInventors: Thomas A. Kamp, Alan J. Miller
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Patent number: 6939811Abstract: An apparatus and method for etching a feature in a wafer with improved depth control and reproducibility is described. The feature is etched at a first etching rate and then at a second etching rate, which is slower than the first etching rate. An optical end point device is used to determine the etching depth and etching is stopped so that the feature has the desired depth. Two different etching rates provides high throughput with good depth control and reproducibility. The apparatus includes an etching tool in which a chuck holds the wafer to be etched. An optical end point device is positioned to measure the feature etch depth. An electronic controller communicates with the optical end point device and the etching tool to control the tool to reduce the etch rate part way through etching the feature and to stop the etching tool, so that that the feature is etched to the desired depth.Type: GrantFiled: September 25, 2002Date of Patent: September 6, 2005Assignee: Lam Research CorporationInventors: Tom A. Kamp, Alan J. Miller, Vijayakumar C. Venugopal
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Publication number: 20040175950Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.Type: ApplicationFiled: June 27, 2003Publication date: September 9, 2004Applicant: LAM RESEARCH CORPORATIONInventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller
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Publication number: 20040084406Abstract: An apparatus and method for etching a feature in a wafer with improved depth control and reproducibility is described. The feature is etched at a first etching rate and then at a second etching rate, which is slower than the first etching rate. An optical end point device is used to determine the etching depth and etching is stopped so that the feature has the desired depth. Two different etching rates provides high throughput with good depth control and reproducibility. The apparatus includes an etching tool in which a chuck holds the wafer to be etched. An optical end point device is positioned to measure the feature etch depth. An electronic controller communicates with the optical end point device and the etching tool to control the tool to reduce the etch rate part way through etching the feature and to stop the etching tool, so that that the feature is etched to the desired depth.Type: ApplicationFiled: September 25, 2002Publication date: May 6, 2004Applicant: Lam Research CorporationInventors: Tom A. Kamp, Alan J. Miller, Vijayakumar C. Venugopal
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Patent number: 6649996Abstract: A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first etching chemistry is applied which preferentially etches a one type of component material. A second etching chemistry is applied which preferentially etches another type of component material. The method or process toggles back and forth between the etching chemistries until the target level is reached. The toggling techniques serves to maintain the profiles of the different component materials. One component material might also be embedded, as a collar or otherwise, around another component material. The toggling technique can serve to modulate the height, level, or shape of one material relative to another material. The toggling steps can be performed in situ or ex situ.Type: GrantFiled: February 27, 2001Date of Patent: November 18, 2003Assignee: Lam Research CorporationInventors: Alan J. Miller, Fandayani Soesilo
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Patent number: 6432832Abstract: A method of performing a shallow trench isolation etch in a silicon layer of a layer stack is disclosed. The layer stack includes a silicon layer being disposed below a pad oxide layer, the pad oxide being disposed below a nitride layer, and the nitride layer being disposed below a photoresist mask. The etching takes place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas, and etching through the nitride layer with the first plasma. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas, and substantially removing the photoresist mask with the second plasma, wherein a substantial portion of the photoresist mask is removed from above the nitride layer before the silicon layer.Type: GrantFiled: June 30, 1999Date of Patent: August 13, 2002Assignee: Lam Research CorporationInventors: Alan J. Miller, Yosias Melaku
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Publication number: 20010029106Abstract: A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first etching chemistry is applied which preferentially etches a one type of component material. A second etching chemistry is applied which preferentially etches another type of component material. The method or process toggles back and forth between the etching chemistries until the target level is reached. The toggling techniques serves to maintain the profiles of the different component materials. One component material might also be embedded, as a collar or otherwise, around another component material. The toggling technique can serve to modulate the height, level, or shape of one material relative to another material. The toggling steps can be performed in situ or ex situ.Type: ApplicationFiled: February 27, 2001Publication date: October 11, 2001Applicant: Lam Research CorporationInventors: Alan J. Miller, Fandayani Soesilo
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Patent number: 6287974Abstract: A method of etching a trench in a silicon layer is disclosed. The silicon layer being disposed below an oxide layer. The oxide layer being disposed below a nitride layer. The nitride layer being disposed below a photoresist mask. The etching taking place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas and etching substantially through the nitride layer with the first plasma. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas and etching through the oxide layer and a portion of the silicon layer with the second plasma wherein the etching with the second plasma is extended for a period of time after the pad oxide layer is etched through. The period of time being sufficiently long to form an effective top-rounded feature on a portion of the trench.Type: GrantFiled: June 30, 1999Date of Patent: September 11, 2001Assignee: Lam Research CorporationInventor: Alan J. Miller
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Patent number: 6225234Abstract: A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first etching chemistry is applied which preferentially etches a one type of component material. A second etching chemistry is applied which preferentially etches another type of component material. The method or process toggles back and forth between the etching chemistries until the target level is reached. The toggling techniques serves to maintain the profiles of the different component materials. One component material might also be embedded, as a collar or otherwise, around another component material. The toggling technique can serve to modulate the height, level, or shape of one material relative to another material. The toggling steps can be performed in situ or ex situ.Type: GrantFiled: March 30, 2000Date of Patent: May 1, 2001Assignee: Lam Research CorporationInventors: Alan J. Miller, Fandayani Soesilo