Abstract: A digital sampler generates a digital video signal by digitally sampling an analog video signal based on a pixel clock signal. The analog signal comprises a static image. A signal generator generates the pixel clock signal based on a reference signal for the analog video signal and a delay signal. A delay controller generates the delay signal at a plurality of levels. A histogram circuit generates a pair of histograms for each of the plurality of levels of the delay signal, compares each pair of histograms for a difference value, and identifies a pair of histograms having a least difference value. Each histogram comprises occurrences of color values in a given frame of the digital video signal.

Abstract: A line parameter detection circuit (70) of this invention includes an active video detector (72) that generates an “active video” signal (102) indicative of a video signal (100) containing video data that exceeds a predetermined threshold level. The line parameter detection circuit further includes three counters (82, 84, 86) that are incremented by a reference clock (110). The counters are reset and start counting reference clock pulses upon receiving an HSYNC pulse (104). A left edge register (90) stores the count accumulated in the first counter upon receiving a rising edge of the active video signal, a right edge register (92) stores the count accumulated in the second counter upon receiving a falling edge of the active video signal, and a line length register (96) stores the count accumulated in the third counter upon receiving the next subsequent HSYNC pulse. Each video signal scan line includes blanking periods (106, 108) between the HSYNC pulses and the active video region.

Abstract: A video projection display system (10) of this invention employs histograms to detect an active video region (2) of a video frame (1). A microcontroller (16) loads registers (27) in an ASIC (26) to accumulate histograms of low pixel values occurring within columns (70-74) of video data. The microcontroller scans the histograms to, identify the left-most column in which a set (80) of black pixel values is clustered, which column marks the left edge of the active video region. The right edge of the active video region is detected in a similar manner. The video signal may also include overshoot and noise. When an ADC (24) digitizes the video signal, the overshoot and noise causes many bright pixels to be converted to below their maximum digital values. Therefore, the microcontroller programs the ASIC such that a histogram (90) of the highest pixel values is collected from within the active video region.