Patents by Inventor Alan Mark Morton
Alan Mark Morton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10658988Abstract: A signal processing system may include a modulation stage configured to generate a modulated input signal, an open-loop switched mode driver coupled to the modulation stage and configured to generate an output signal from the modulated input signal, a voltage regulator configured to generate a supply voltage that supplies electrical energy to the open-loop switched mode driver, and a control subsystem configured to, when a magnitude of the modulated input signal falls below a threshold magnitude, control the voltage regulator to control the supply voltage such that the output signal varies non-linearly with the modulated input signal for magnitudes of the modulated input signal below the threshold magnitude.Type: GrantFiled: April 2, 2018Date of Patent: May 19, 2020Assignee: Cirrus Logic, Inc.Inventors: Miao Song, Xiaofan Franky Fei, Xin Zhao, Tejasvi Das, Lei Zhu, Jing Bai, Alan Mark Morton
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Patent number: 10447217Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.Type: GrantFiled: January 31, 2018Date of Patent: October 15, 2019Assignee: Cirrus Logic, Inc.Inventors: Xin Zhao, Tejasvi Das, Xiaofan Fei, Alan Mark Morton
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Patent number: 10404248Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.Type: GrantFiled: December 13, 2018Date of Patent: September 3, 2019Assignee: Cirrus Logic, Inc.Inventors: Tejasvi Das, Alan Mark Morton, Xin Zhao, Lei Zhu, Xiaofan Fei, Johann G. Gaboriau, John L. Melanson, Amar Vellanki
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Publication number: 20190115886Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, wherein a first gain of the first path and a second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.Type: ApplicationFiled: September 17, 2018Publication date: April 18, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Tejasvi DAS, Alan Mark MORTON, Xin ZHAO, Lei ZHU, Xiaofan FEI, Johann G. GABORIAU, John L. MELANSON, Amar VELLANKI
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Publication number: 20190115909Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.Type: ApplicationFiled: December 13, 2018Publication date: April 18, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Tejasvi DAS, Alan Mark MORTON, Xin ZHAO, Lei ZHU, Xiaofan FEI, Johann G. GABORIAU, John L. MELANSON, Amar VELLANKI
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Patent number: 10263584Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, wherein a first gain of the first path and a second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.Type: GrantFiled: September 17, 2018Date of Patent: April 16, 2019Assignee: Cirrus Logic, Inc.Inventors: Tejasvi Das, Alan Mark Morton, Xin Zhao, Lei Zhu, Xiaofan Fei, Johann G. Gaboriau, John L. Melanson, Amar Vellanki
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Patent number: 10181845Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.Type: GrantFiled: March 21, 2018Date of Patent: January 15, 2019Assignee: Cirrus Logic, Inc.Inventors: Tejasvi Das, Alan Mark Morton, Xin Zhao, Lei Zhu, Xiaofan Fei, Johann G. Gaboriau, John L. Melanson, Amar Vellanki
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Patent number: 10008992Abstract: An amplifier may include a final output stage switchable among a plurality of modes comprising a mode which is enabled by coupling an output driver to an output of the final output stage and a preconditioning circuit coupled to the output of the final output stage. The preconditioning circuit may be configured to precondition at least one of a voltage and a current of the output of the final output stage prior to coupling the output driver to the output of the final output stage to limit audio artifacts caused by switching the final output stage to the mode or may be configured to perform a switching sequence to switch between a first mode and a second mode of the plurality of modes, such that at all points of the switching sequence, output terminals of the output of the final output stage have a known impedance.Type: GrantFiled: April 14, 2017Date of Patent: June 26, 2018Assignee: Cirrus Logic, Inc.Inventors: Lei Zhu, Xin Zhao, Alan Mark Morton, Tejasvi Das, Ku He, Xiaofan Fei
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Publication number: 20180159488Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.Type: ApplicationFiled: January 31, 2018Publication date: June 7, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Xin ZHAO, Tejasvi DAS, Xiaofan FEI, Alan Mark MORTON
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Publication number: 20180091102Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.Type: ApplicationFiled: September 27, 2016Publication date: March 29, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Xin ZHAO, Tejasvi DAS, Xiaofan FEI, Alan Mark MORTON
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Patent number: 9929703Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.Type: GrantFiled: September 27, 2016Date of Patent: March 27, 2018Assignee: Cirrus Logic, Inc.Inventors: Xin Zhao, Tejasvi Das, Xiaofan Fei, Alan Mark Morton
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Patent number: 9917557Abstract: A method for offset calibration may include decoupling a modulator input of a first path from a first stage output, coupling a second path output to the modulator input, applying a common-mode voltage to a second path input, receiving a calibration signal from the modulator output generated in response to the common-mode voltage, and modifying one or more parameters of the modulator to compensate for an offset between the first path and the second path indicated by the calibration signal.Type: GrantFiled: April 17, 2017Date of Patent: March 13, 2018Assignee: Cirrus Logic, Inc.Inventors: Lei Zhu, Xin Zhao, Tejasvi Das, Alan Mark Morton, Xiaofan Fei
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Patent number: 5959926Abstract: A programmable power controller controls power between a primary power source and a secondary power source and powering first circuitry. The primary power source has a first voltage and the secondary power source has a second voltage. A control register has a first field, which is field used to activate circuitry used to direct power from the primary power source to the secondary power source. First logic circuitry compares the first voltage and the second voltage to determine which is greater and then couples the primary power source or the secondary power source, depending upon which is greater, to power the first logic circuitry, second logic circuitry, and memory. The memory is coupled to the first logic circuitry and is read and written to via an input/output buffer.Type: GrantFiled: April 13, 1998Date of Patent: September 28, 1999Assignee: Dallas Semiconductor Corp.Inventors: Brian W. Jones, Alan Mark Morton