Abstract: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated.

Abstract: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated.

Abstract: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated.

Abstract: Methods and apparatus for reducing the amount of leakage in a transmitter are disclosed. In one embodiment, a wireless transmitter is comprises: a divider providing a local oscillation (LO) signal, a plurality of mixers that receive the LO signal and receive a signal to be modulated, a summer coupled to the plurality of mixers, and a plurality of amplifiers serially coupled to the summer. The divider couples to a capacitor, a resistor, and a power supply and the resistor and the capacitor form a pole that attenuates the LO signal present on the power supply.

Abstract: A CMOS hybrid analog-digital receiver core where filtering and gain functions are implemented in the digital domain. The analog portion of the receiver core includes standard circuits such as a low noise amplifier for receiving an RF input signal, and a mixer circuit for down-converting the RF input signal to a base band frequency signal. The analog to digital conversion function is provided by a merged ADC filter circuit having a low order filter stage and an ADC stage. The low order filter stage performs low order filtering of the base band signal to reduce dynamic range and clock requirements for subsequent analog to digital conversion the ADC stage. The two circuit stages are considered to be merged since they both consist of an interconnection of identical transconductance cells, where each transconductance cell includes a series of interconnected CMOS inverters.

Abstract: A signal having a substantially uniform spectral distribution, e.g., a flat noise signal such as a signal ground, is provided at the input of a bandpass filter such as an IF filter of a receiver circuit, to thereby produce an output signal at the output of the bandpass filter. The output signal is processed in a limiter to produce a limited signal. An average frequency of the limited signal is determined, and the bandpass filter is adjusted based on the determined average frequency. According to one embodiment of the present invention, the bandpass filter comprises a Gm-C filter having a transconductance, and the filter is adjusted by adjusting the transconductance of the Gm-C filter based on the determined average frequency. According to another aspect of the present invention, a desired center frequency for the bandpass filter is identified. A resolution and a desired confidence interval are also identified.

Abstract: A stream of complex numbers is converted into polar form, including an amplitude-representative part and a phase-representative part. The amplitude-representative part of each of the converted complex numbers is represented as a plurality of digits of decreasing numerical significance. The phase-representative part of each of the converted complex numbers is phase-modulated at the radio carrier frequency to produce a phase-modulated drive signal. The phase-modulated drive signal is amplified in a plurality of power amplifiers. A respective one of the power amplifiers provides a maximum output power level at a respective amplifier output that is related to a respective one of the decreasing numerical significance. The output amplitude of a respective one of the plurality of power amplifiers is controlled by applying a respective one of the plurality of digits of decreasing numerical significance to a respective one of the plurality of power amplifiers.

Abstract: A signal having a substantially uniform spectral distribution, e.g., a flat noise signal such as a signal ground, is provided at the input of a bandpass filter such as an IF filter of a receiver circuit, to thereby produce an output signal at the output of the bandpass filter. The output signal is processed in a limiter to produce a limited signal. An average frequency of the limited signal is determined, and the bandpass filter is adjusted based on the determined average frequency. According to one embodiment of the present invention, the bandpass filter comprises a Gm-C filter having a transconductance, and the filter is adjusted by adjusting the transconductance of the Gm-C filter based on the determined average frequency. According to another aspect of the present invention, a desired center frequency for the bandpass filter is identified. A resolution and a desired confidence interval are also identified.

Abstract: A signal having a substantially uniform spectral distribution, e.g., a flat noise signal such as a signal ground, is provided at the input of a bandpass filter such as an IF filter of a receiver circuit, to thereby produce an output signal at the output of the bandpass filter. The output signal is processed in a limiter to produce a limited signal. An average frequency of the limited signal is determined, and the bandpass filter is adjusted based on the determined average frequency. According to one embodiment of the present invention, the bandpass filter comprises a Gm-C filter having a transconductance, and the filter is adjusted by adjusting the transconductance of the Gm-C filter based on the determined average frequency. According to another aspect of the present invention, a desired center frequency for the bandpass filter is identified. A resolution and a desired confidence interval are also identified.

Abstract: Modulation systems and methods can modulate a stream of complex numbers representing a desired modulation of a radio signal by representing a real part of each of the complex numbers in a stream of complex numbers representing a desired modulation of a radio signal, as a plurality of first digits of decreasing numerical significance and representing an imaginary part of each of the complex numbers as a plurality of second digits of decreasing numerical significance. A respective one of the first digits and a respective one of the second digits of like numerical significance are grouped to form a plurality of phase control symbols. A respective phase control symbol is then used to control the phase of an output signal at the radio carrier frequency from a respective one of the plurality of power amplifiers. Each of the power amplifiers provides an output power level that is related to the numerical significance of the first and second digits that form the associated phase control symbol.

Abstract: A power-on reset circuit for resetting the register values contained on an integrated circuit upon power-up of the integrated circuit. The power-on reset circuit can be implemented either internal or external to the integrated circuit. The power-on reset circuit generates a reset signal as long as the supply voltage is not in the operational range and maintains the reset signal for a certain time after the supply voltage has returned to its nominal value. The power-on reset circuit also provides accurate detection of a serious supply voltage drop and has low power consumption. The power-on reset circuit comprises a battery, a voltage-referenced switching circuit, a current source, a capacitor and a voltage buffer.

Abstract: Power IQ modulation systems and methods include first and second power amplifiers, each including a signal input, a supply input and a power input. The first and second power amplifiers are preferably class-C power amplifiers. A source of first, second, third and fourth reference frequency signals is also provided. The first and second reference frequency signals are inverted relative to one another, and the third and fourth reference frequency signals are inverted relative to one another. Preferably, the first, second, third and fourth reference frequency signals are 0°, 180°, 90° and 270° phase shifted reference frequency signals, respectively. A switching system is also provided that selectively applies one of the first and second reference frequency signals to the signal input of the first power amplifier as a function of the polarity of one of the I and Q input signals.

Abstract: An improved receiver architecture utilizing active filters for frequency conversion, wherein the final IF stage operates at a frequency higher than the previous IF stage, is disclosed to facilitate the processing by a baseband system operating at higher IF of signals from receivers operating at lower IFs and to enable the continued use of existing post-IF devices with multiple-conversion receivers. A low IF signal output is digitally mixed with a divided local oscillator signal to achieve a higher IF which is suited for processing by post-IF components such as a detector. The mixed signal is then filtered by a low dynamic range active filter and limited.