Patents by Inventor Alan Righter

Alan Righter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bond pad with integrated transient over-voltage protection
    Patent number: 8222698
    Abstract: In various embodiments, the invention relates to bond pad structures including planar transistor structures operable as over-voltage clamps.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: July 17, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Javier Salcedo, Alan Righter
  • Transient over-voltage clamp
    Patent number: 8044457
    Abstract: In various embodiments, the invention relates to semiconductor structures, such as planar MOS structures, suitable as voltage clamp devices. Additional doped regions formed in the structures may improve over-voltage protection characteristics.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: October 25, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Javier Salcedo, Alan Righter
  • TRANSIENT OVER-VOLTAGE CLAMP
    Publication number: 20100327342
    Abstract: In various embodiments, the invention relates to semiconductor structures, such as planar MOS structures, suitable as voltage clamp devices. Additional doped regions formed in the structures may improve over-voltage protection characteristics.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 30, 2010
    Inventors: Javier Salcedo, Alan Righter
  • BOND PAD WITH INTEGRATED TRANSIENT OVER-VOLTAGE PROTECTION
    Publication number: 20100327343
    Abstract: In various embodiments, the invention relates to bond pad structures including planar transistor structures operable as over-voltage clamps.
    Type: Application
    Filed: January 12, 2010
    Publication date: December 30, 2010
    Applicant: Analog Devices, Inc.
    Inventors: Javier Salcedo, Alan Righter
  • Integrated circuit bond pad structures and methods of making
    Publication number: 20050200017
    Abstract: A bond pad structure for an integrated circuit includes first and second active devices formed in a substrate, first and second buses above the first and second active devices, respectively, a bond pad above the first and second buses, first interconnections between the first and second active devices and the bond pad, and second interconnections between the first and second active devices and the first and second buses, respectively. The first active device may be at least one PMOS transistor, and the second active device may be at least one NMOS transistor. A guard band region may be formed in the substrate.
    Type: Application
    Filed: May 12, 2005
    Publication date: September 15, 2005
    Applicant: Analog Devices, Inc.
    Inventor: Alan Righter
  • Integrated circuit bond pad structures and methods of making
    Publication number: 20050087807
    Abstract: A bond pad structure for an integrated circuit includes first and second active devices formed in a substrate, first and second buses above the first and second active devices, respectively, a bond pad above the first and second buses, first interconnections between the first and second active devices and the bond pad, and second interconnections between the first and second active devices and the first and second buses, respectively. The first active device may be at least one PMOS transistor, and the second active device may be at least one NMOS transistor. A guard band region may be formed in the substrate.
    Type: Application
    Filed: October 28, 2003
    Publication date: April 28, 2005
    Applicant: Analog Devices, Inc.
    Inventor: Alan Righter