Abstract: An etching process for patterning thin film cermet (14) on a semiconductor substrate (10) using a mild, room temperature acid solution as the etchant. The semiconductor substrate (10) has a glass passivating layer (12) , such as silicon dioxide, deposited thereon. The cermet layer (14) is deposited on the silicon dioxide layer (12). A photoresist layer (16) is deposited and patterned on the cermet layer (14) followed by the deposition of a layer of aluminum (18) . The cermet (14) is then preferentially etched with a mild, room temperature hydrofluoric acid solution, diluted with hydrochloric acid, to form the desired cermet resistance pattern.

Abstract: Arsenic or other dopant selected from Group III or Group V of the Periodic Table of Elements is diffused into a silicon substrate to form a semiconductor product having a buried region, such as a buried layer or channel, by providing the substrate with a layer of polycrystalline silicon doped with the selected dopant and heating the substrate and layer in an oxygen environment at a temperature and for a period of time sufficient to oxidize all or substantially all the polycrystalline silicon and simultaneously diffuse the dopant into the substrate. The substrate comprises single crystal silicon or other silicon form whose oxidation rate is comparable to or less than the polycrystalline silicon to permit complete oxidation of the polycrystalline silicon without excessive oxidation of the substrate.

Abstract: An etching process for patterning cermet thin film resistors includes the provision of a layer of molybdenum over the cermet layer to provide a good adherent surface for a photoresist layer subsequently deposited thereon. After the photoresist and molybdenum layers are patterned in separate steps, the cermet is preferentially etched with hot phosphoric acid to produce the desired cermet resistance pattern.