Abstract: A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.

Abstract: A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.

Abstract: Embodiments discussed herein refer to systems, methods, and circuits for conforming to power up sequencing rules of a conventional hard-wired data connection even though the hard-wired data connection that would ordinarily exist between two data controllers has been replaced with one or more contactless connectors. A consequence of replacing the hard-wired connection with a contactless connector is that the data controllers no longer directly control the power sequencing between the controllers because they are not able to directly communicate with each other over the hard-wired data connections. Power sequence assist circuitry may be used to assists the data controllers in establishing a link in accordance with the power sequencing rules of a particular wired interface despite the intentionally broken hard-wired data connection between the two controllers by instructing the contactless connectors to communicate with their respective data controllers in compliance with the power sequencing rules.

Abstract: Embodiments discussed herein refer to systems, methods, and circuits for conforming to power up sequencing rules of a conventional hard-wired data connection even though the hard-wired data connection that would ordinarily exist between two data controllers has been replaced with one or more contactless connectors. A consequence of replacing the hard-wired connection with a contactless connector is that the data controllers no longer directly control the power sequencing between the controllers because they are not able to directly communicate with each other over the hard-wired data connections. Power sequence assist circuitry may be used to assists the data controllers in establishing a link in accordance with the power sequencing rules of a particular wired interface despite the intentionally broken hard-wired data connection between the two controllers by instructing the contactless connectors to communicate with their respective data controllers in compliance with the power sequencing rules.

Abstract: Embodiments discussed herein refer to systems, methods, and circuits for conforming to power up sequencing rules of a conventional hard-wired data connection even though the hard-wired data connection that would ordinarily exist between two data controllers has been replaced with one or more contactless connectors. A consequence of replacing the hard-wired connection with a contactless connector is that the data controllers no longer directly control the power sequencing between the controllers because they are not able to directly communicate with each other over the hard-wired data connections. Power sequence assist circuitry may be used to assists the data controllers in establishing a link in accordance with the power sequencing rules of a particular wired interface despite the intentionally broken hard-wired data connection between the two controllers by instructing the contactless connectors to communicate with their respective data controllers in compliance with the power sequencing rules.

Abstract: Embodiments discussed herein refer to systems, methods, and circuits for conforming to power up sequencing rules of a conventional hard-wired data connection even though the hard-wired data connection that would ordinarily exist between two data controllers has been replaced with one or more contactless connectors. A consequence of replacing the hard-wired connection with a contactless connector is that the data controllers no longer directly control the power sequencing between the controllers because they are not able to directly communicate with each other over the hard-wired data connections. Power sequence assist circuitry may be used to assists the data controllers in establishing a link in accordance with the power sequencing rules of a particular wired interface despite the intentionally broken hard-wired data connection between the two controllers by instructing the contactless connectors to communicate with their respective data controllers in compliance with the power sequencing rules.

Abstract: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the system can also be calibrated in a symmetric or asymmetric technique through sampling of a data pattern to determine an ideal level of the trip reference voltage.

Abstract: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the system can also be calibrated in a symmetric or asymmetric technique through sampling of a data pattern to determine an ideal level of the trip reference voltage.

Abstract: Embodiments of the invention are generally directed to a single-ended configurable multi-mode driver. An embodiment of an apparatus includes an input to receive an input signal, an output to transmit a driven signal generated from the input signal on a communication channel, a mechanism for independently configuring a termination resistance of the driver apparatus, and a mechanism for independently configuring a voltage swing of the driven signal without modifying a supply voltage for the apparatus.

Abstract: Embodiments of the invention are generally directed to a single-ended configurable multi-mode driver. An embodiment of an apparatus includes an input to receive an input signal, an output to transmit a driven signal generated from the input signal on a communication channel, a mechanism for independently configuring a termination resistance of the driver apparatus, and a mechanism for independently configuring a voltage swing of the driven signal without modifying a supply voltage for the apparatus.

Abstract: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the system can also be calibrated in a symmetric or asymmetric technique through sampling of a data pattern to determine an ideal level of the trip reference voltage.

Abstract: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the system can also be calibrated in a symmetric or asymmetric technique through sampling of a data pattern to determine an ideal level of the trip reference voltage.

Abstract: Embodiments of the invention are generally directed to a hybrid interface for serial and parallel communication. An embodiment of a method includes initializing a first apparatus for transmission of data to or reception of data from a second apparatus, switching an interface for the first apparatus to a first mode for a parallel interface, the parallel interface including a first plurality of pins, and transmitting or receiving parallel data in the first mode via the first plurality of pins. The method further includes switching the interface of the first apparatus to a second mode for a serial interface, the serial interface including a second plurality of pins, the first plurality of pins and the second plurality of pins both including an overlapping set of pins, and transmitting or receiving serial data in the second mode via the second plurality of pins.

Abstract: Embodiments of the invention are generally directed to a hybrid interface for serial and parallel communication. An embodiment of a method includes initializing a first apparatus for transmission of data to or reception of data from a second apparatus, switching an interface for the first apparatus to a first mode for a parallel interface, the parallel interface including a first plurality of pins, and transmitting or receiving parallel data in the first mode via the first plurality of pins. The method further includes switching the interface of the first apparatus to a second mode for a serial interface, the serial interface including a second plurality of pins, the first plurality of pins and the second plurality of pins both including an overlapping set of pins, and transmitting or receiving serial data in the second mode via the second plurality of pins.

Abstract: Embodiments of the invention are generally directed to a hybrid interface for serial and parallel communication. An embodiment of a method includes initializing a first apparatus for transmission of data to or reception of data from a second apparatus, switching an interface for the first apparatus to a first mode for a parallel interface, the parallel interface including a first plurality of pins, and transmitting or receiving parallel data in the first mode via the first plurality of pins. The method further includes switching the interface of the first apparatus to a second mode for a serial interface, the serial interface including a second plurality of pins, the first plurality of pins and the second plurality of pins both including an overlapping set of pins, and transmitting or receiving serial data in the second mode via the second plurality of pins.

Abstract: Embodiments of the invention are generally directed to a hybrid interface for serial and parallel communication. An embodiment of a method includes initializing a first apparatus for transmission of data to or reception of data from a second apparatus, switching an interface for the first apparatus to a first mode for a parallel interface, the parallel interface including a first plurality of pins, and transmitting or receiving parallel data in the first mode via the first plurality of pins. The method further includes switching the interface of the first apparatus to a second mode for a serial interface, the serial interface including a second plurality of pins, the first plurality of pins and the second plurality of pins both including an overlapping set of pins, and transmitting or receiving serial data in the second mode via the second plurality of pins.

Abstract: A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.

Abstract: The invention provides a central office metaphor to computing, where features and functions are provided by a one or more servers and communicated to an appliance terminal through a network. Data providers are defined as “services” and are provided by one or more processing resources. The services communicate to display terminals through a network, such as Ethernet. The terminals are configured to display data, and to send keyboard, cursor, audio, and video data through the network to the processing server. Functionality is partitioned so that databases, server and graphical user interface functions are provided by the services, and human interface functionality is provided by the terminal. Communication with the terminals from various services is accomplished by converting disparate output to a common protocol. Appropriate drivers are provided for each service to allow protocol conversion. Multiple terminals are coupled to the network.

Abstract: A communication system including two endpoints (transceivers or a transmitter and receiver) and a serial link between them. At least one endpoint is configured to generate encoded data in accordance with a line code and to transmit the encoded data over the link. The line code specifies a block code for encoding cells of application data and control bits, and typically also special characters that do not match bit sequences of encoded cells. Other aspects of the invention are methods for generating (and endpoint devices configured to generate and transmit, or receive and process) such encoded data, and methods for performing functions of multiple layers of a communication protocol in response to such encoded data. In accordance with the invention, multiple levels of communication protocol functionality can be efficiently incorporated within a line code.

Abstract: A method and apparatus for decoding signals received from a network and distributing the decoded signals to multiple users. A bulk decoder coupled to a network decodes data received from the network and transmits the decoded data to an interconnect for distribution to a plurality of users. The number and type of bulk decoders may be adjusted in accordance with system load.