Patents by Inventor Alan T Wootton
Alan T Wootton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11340908Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: September 11, 2020Date of Patent: May 24, 2022Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Publication number: 20210072998Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: September 11, 2020Publication date: March 11, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: NEAL ANDREW CROOK, ALAN T. WOOTTON, JAMES PETERSON
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Patent number: 10776127Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: October 3, 2018Date of Patent: September 15, 2020Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Publication number: 20190034204Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: October 3, 2018Publication date: January 31, 2019Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Patent number: 10114647Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: December 10, 2013Date of Patent: October 30, 2018Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Publication number: 20140101415Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: December 10, 2013Publication date: April 10, 2014Applicant: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Patent number: 8612728Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: August 8, 2011Date of Patent: December 17, 2013Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Publication number: 20110296144Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: August 8, 2011Publication date: December 1, 2011Applicant: Micron Technology, Inc.Inventors: Neal ANDREW CROOK, Alan T. Wootton, James Peterson
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Patent number: 8006072Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: May 18, 2010Date of Patent: August 23, 2011Assignee: Micron Technology, Inc.Inventors: Neal Andrew Cook, Alan T. Wootton, James Peterson
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Publication number: 20100228953Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: May 18, 2010Publication date: September 9, 2010Applicant: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Patent number: 7734899Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: February 26, 2007Date of Patent: June 8, 2010Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson
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Patent number: 7200738Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: GrantFiled: April 18, 2002Date of Patent: April 3, 2007Assignee: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T Wootton, James Peterson
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Publication number: 20030200421Abstract: A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.Type: ApplicationFiled: April 18, 2002Publication date: October 23, 2003Applicant: Micron Technology, Inc.Inventors: Neal Andrew Crook, Alan T. Wootton, James Peterson