Abstract: The present invention relates to a system and method for digitally compensating signal converters and in particular a digital to analog converter which receives digital input data for a digital to analog converter and supplies anti-function digital coefficients derived from the error function of the digital to analog converter and corresponding to the digital input data and applies the anti-function digital coefficients to the digital input data to pre-condition the digital input data to compensate for the error function of the digital to analog converter. The invention also extends to analog to digital converters.

Abstract: An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and/or analog signal chain.

Abstract: The present invention relates to a system and method for digitally compensating signal converters and in particular a digital to analog converter which receives digital input data for a digital to analog converter and supplies anti-function digital coefficients derived from the error function of the digital to analog converter and corresponding to the digital input data and applies the anti-function digital coefficients to the digital input data to pre-condition the digital input data to compensate for the error function of the digital to analog converter. The invention also extends to analog to digital converters.

Abstract: A method for communicating between a controller and a device with double-buffered inputs comprises the steps of providing one or more communication paths for exchanging data between the controller and the device, providing a data transfer control signal from the controller to the device for transferring input data from one or more input registers into one or more latchable data registers, and providing a data transfer delay signal from the device to the controller, wherein, in a first logic state, the data transfer delay signal prevents transfer of input data from the input registers into the latchable data registers until after a transition to a second logic state occurs on the data transfer delay signal. An apparatus for communicating between a controller and a device is also described.

Abstract: An integrated digital calibration circuit and digital to analog converter includes a digital to analog converter (DAC) and a digital calibration circuit including a memory for storing predetermined end point coefficients of the digital to analog converter transfer function; and an arithmetic logic unit for applying the end point coefficients to the DAC input signal to adjust the end points of the DAC and/or analog signal chain.

Abstract: A speech recognition technique uses lexical tree pre-filtering to obtain lists of words for use in performing speech recognition. The lexical tree pre-filtering includes representing a vocabulary of words using a lexical tree and identifying a first subset of the vocabulary that may correspond to speech spoken beginning at a first time by propagating through the lexical tree information about the speech spoken beginning at the first time. A second subset of the vocabulary that may correspond to speech spoken beginning at a second time is identified by propagating through the lexical tree information about the speech spoken beginning at the second time. Words included in the speech are recognized by comparing speech spoken beginning at the first time with words from the first subset of the vocabulary and speech spoken beginning at the second time with words from the second subset of the vocabulary. The state of the lexical tree is not reset between identifying the first and second subsets.

Abstract: A chamber useful with an atomic absorption spectrometer includes at least two atomization means installed therein. The means can be serially aligned with the measuring beam or arranged parallel to the axis thereof.