Patents by Inventor Alan Weger

Alan Weger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11105856
    Abstract: Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 31, 2021
    Assignee: International Business Machines Corporation
    Inventors: Emily A. Ray, Emmanuel Yashchin, Peilin Song, Kevin G. Stawiasz, Barry Linder, Alan Weger, Keith A. Jenkins, Raphael P. Robertazzi, Franco Stellari, James Stathis
  • Publication number: 20200150181
    Abstract: Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 14, 2020
    Inventors: Emily A. Ray, Emmanuel Yashchin, Peilin Song, Kevin G. Stawiasz, Barry Linder, Alan Weger, Keith A. Jenkins, Raphael P. Robertazzi, Franco Stellari, James Stathis
  • Publication number: 20080079448
    Abstract: Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vd, the enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
    Type: Application
    Filed: December 3, 2007
    Publication date: April 3, 2008
    Inventors: Chandler McDowell, Stanislav Polonsky, Peilin Song, Franco Stellari, Alan Weger
  • Publication number: 20070265722
    Abstract: A method of modeling yield for semiconductor products includes determining expected faults for each of a plurality of library elements by running a critical area analysis on each of the library elements, and assessing, from the critical area analysis, an expected number of faults per unit area, and comparing the same to actual observed faults on previously manufactured semiconductor products. Thereafter, the expected number of faults for each library element is updated in response to observed yield. A database is established, which includes the die size and expected faults for each of the library elements. Integrated circuit product die size is estimated, and library elements to be used to create the integrated circuit die are selected. Fault and size data for each of the selected library elements are obtained, the adjusted estimated faults for each of the library elements are summed, and estimated yield is calculated.
    Type: Application
    Filed: May 12, 2006
    Publication date: November 15, 2007
    Applicant: International Business Machines Corporation
    Inventors: Thomas Barnett, Jeanne Bickford, William Chang, Rashmi Chatty, Sebnem Jaji, Kerry Kravec, Wing Lai, Gie Lee, Brian Trapp, Alan Weger
  • Publication number: 20070098037
    Abstract: Techniques for enhancing thermal design of a system having a number of boundary values are provided. A method for such enhancement includes representing thermal response of the system to the boundary values, obtaining at least one constraining parameter, and determining spatial and/or temporal distribution of the boundary values. The thermal response is represented as a superposition of temperature fields associated with given boundary values. The spatial and/or temporal distribution of the boundary values is determined based on the thermal response represented in the representing step, so as to satisfy the constraining parameter. The boundary values can be, for example, power sources, and the at least one constraining parameter can be, for example, a spatial or temporal location of one of the power sources.
    Type: Application
    Filed: November 2, 2005
    Publication date: May 3, 2007
    Applicant: International Business Machines Corporation
    Inventors: Hendrik Hamann, James Lacey, Jamil Wakil, Alan Weger
  • Publication number: 20060039114
    Abstract: A present invention provides real-time temperature and power mapping of fully operating electronic devices. The method utilizes infrared (IR) temperature imaging, while an IR-transparent coolant flows through a specially designed cell directly over the electronic device. In order to determine the chip power distributions the individual temperature fields for each heat source of a given power and size on the chip (as realized by a scanning focused laser beam) are measured under the same cooling conditions. Then the measured chip temperature distribution is represented as a superposition of the temperature fields of these individual heat sources and the corresponding power distribution is calculated with a set of linear equations.
    Type: Application
    Filed: August 17, 2004
    Publication date: February 23, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hendrik Hamann, James Lacey, Martin O'Boyle, Robert von Gutfeld, Jamil Wakil, Alan Weger
  • Publication number: 20060028219
    Abstract: Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vdd, to enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
    Type: Application
    Filed: August 5, 2004
    Publication date: February 9, 2006
    Applicant: International Business Machines Corporation
    Inventors: Chandler McDowell, Stanislav Polonsky, Peilin Song, Franco Stellari, Alan Weger
  • Publication number: 20050218921
    Abstract: A method, system and apparatus are provided for operating a Picosecond Imaging Circuit Analysis (PICA)/high current source system include applying pulses from a high current pulse source to a Device Under Test (DUT). A photosensor detects photon emissions from the DUT. Signals from the photosensor are used to map photon emissions from the DUT. Data processing means relate the photon emissions to specific features of the DUT.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Applicant: International Business Machines Corporation
    Inventors: Naoko Sanda, Steven Voldman, Alan Weger
  • Publication number: 20050168228
    Abstract: A mechanism for diagnosing broken scan chains based on leakage light emission is provided. An image capture mechanism detects light emission from leakage current in complementary metal oxide semiconductor (CMOS) devices. The diagnosis mechanism identifies devices with unexpected light emission. An unexpected amount of light emission may indicate that a transistor is turned off when it should be turned on or vice versa. All possible inputs may be tested to determine whether a problem exists with transistors in latches or with transistors in clock buffers. Broken points in the scan chain may then be determined based on the locations of unexpected light emission.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 4, 2005
    Applicant: International Business Machines Corporation
    Inventors: Peilin Song, Tian Xia, Alan Weger, Franco Stellari, Stanislav Polonsky
  • Publication number: 20050071100
    Abstract: Disclosed are a method and system for processing timing information with respect to an electronic device. The method comprises the steps of generating a first set of responses from the device at a first frequency in response to a first timing signal, and generating a second set of responses from the device at a second frequency in response to a second timing signal. The method comprises the further steps of receiving the first and second sets of responses from the device, and processing the received responses to identify responses that are in synchronization with the first timing signal and responses that are in synchronization with the second timing signal. These timing signals may be related to clock signals applied to the electrical device, to clock signals internally generated by the device, or to extraneous noise that affects the electrical device in some fashion.
    Type: Application
    Filed: September 25, 2003
    Publication date: March 31, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Alan Weger
  • Publication number: 20050062490
    Abstract: Disclosed are a method and system for analyzing leakage current luminescence in CMOS circuits. The method comprises the steps of collecting light emission data from each of a plurality of CMOS circuits, and separating the CMOS circuits into first and second groups. For the first group of CMOS circuits, the emission data from the CMOS circuits are analyzed, based on the presence or absence of leakage light from the CMOS circuits, to identify logic states for the CMOS circuits. For the second group of CMOS circuits, the emission data from the CMOS circuits are analyzed, based on modulation of the intensity of the light from the CMOS circuits, to determine values for given parameters of the circuits. These parameters may be, for example, temperature, cross-talk or power distribution noise.
    Type: Application
    Filed: September 24, 2003
    Publication date: March 24, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stanislav Polonsky, Alan Weger, Moyra Mc Manus