Abstract: An apparatus and method for use in deploying a wireless communication device is provided that includes an antenna element and a reflector secured proximate a first end of the element. The reflector includes a base, and a flexible wall with a first end positioned proximate the base extending away to a second end positioned about the element. The wall can be deformed from an original position to a deformed position where the second end is temporarily positioned proximate the element and released such that the wall returns to the original position. The method includes deforming the reflector from an original position to an altered position where portions of a rim are proximate the element. The reflector is positioned in contact with the communication device, secured in the altered position, maintained in the altered position with a reduced profile, and released such the reflector elastically returns to the original position.

Abstract: A method according to one embodiment may include providing power to at least one light source. The method of this embodiment may also include detecting the frequency of at least one vertical synchronization signal, among a plurality of different synchronization signals, and controlling the power to at least one light source based on, at least in part, the detected frequency of at least one vertical synchronization signal. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: In accordance with at least some embodiments of the invention, a system comprises a processor, a non-volatile storage device coupled to the processor, a read-only memory (ROM) coupled to the processor and to the non-volatile storage device, and software stored in the ROM. The software is executable by the processor and configured to erase the non-volatile storage device by overwriting substantially all of the addressable locations of the non-volatile storage device while boot firmware is controlling the system.

Abstract: A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

Abstract: A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

Abstract: An apparatus and method for use in deploying a wireless communication device is provided that includes an antenna element and a reflector secured proximate a first end of the element. The reflector includes a base, and a flexible wall with a first end positioned proximate the base extending away to a second end positioned about the element. The wall can be deformed from an original position to a deformed position where the second end is temporarily positioned proximate the element and released such that the wall returns to the original position. The method includes deforming the reflector from an original position to an altered position where portions of a rim are proximate the element. The reflector is positioned in contact with the communication device, secured in the altered position, maintained in the altered position with a reduced profile, and released such the reflector elastically returns to the original position.

Abstract: A computer implemented method uses a system (100) for managing meetings. The system (100) has, a database (104) with data fields for entering a meeting definition of a future meeting as meeting definition data; a computer memory (106) storing the data for retrieval by the database (104); and an auto-mailer (108) sending an encrypted and read only meeting definition document and meeting reminders that are generated by the database (104) and sent by the auto-mailer (108) to notify meeting members identified by the data about a future meeting described by the data.

Abstract: A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

Abstract: A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

Abstract: As a program is replaced by the operating system running within a microprocessor, only those entries associated with the replaced program and resident within effective-to-real address translation units will be replaced. Those entries within the effective-to-real address translation units associated with the operating system and shared libraries, and any other software units operating within the microprocessor will not be invalidated.

Abstract: A pacifier retaining device for holding a pacifier on a child so that the child does not lose the pacifier. The pacifier retaining device includes a first strap for encircling the torso of a user. A second strap connects a pacifier to the first strap. The second strap has a first end and a second end. A pacifier is coupled to the second strap. A connecting device rotatably connects the first strap to the second strap. The connecting device comprises a female portion and a male portion. The second end of the second strap is coupled to the male portion. The female portion is coupled to the first strap.

Abstract: A method for storing information in a computer memory system includes maintaining an Mth level storage system including an Mth level data store for storing data, an Mth level full directory for storing a set of tags corresponding to the data, and an Mth level partial directory for storing a subset of the tags. The partial directory is accessible faster than the full directory. Upon an M-1 level miss corresponding to a request for data, a congruence class corresponding to the request is fetched from the partial directory when it is present therein; otherwise, it is fetched from the full directory. The requested data is retrieved from the data store when it is present in the congruence class; otherwise, it is retrieved from a next level of the memory system. The tags in the partial directory may be full tags, partial tags, or a combination thereof.

Abstract: A seismic actuator for initiating various actions and/or changes to a system in response to seismic activity above a predetermined threshold level. In an embodiment of the invention, the actuator comprises a seismic valve for shutting off gas flow through a pipe upon seismic activity above a predetermined threshold level, and for resetting the valve to reestablish gas flow through the pipe. The seismic valve according to embodiments of the present invention may be seated within a pipe in any orientation. The valve includes a stopper capable of alternatively allowing and blocking gas flow, a locking ball capable of restraining the stopper in a position allowing gas flow, and a plunger for securing the locking ball in a location where the ball restrains the stopper in the position allowing gas flow. The valve further includes a pendulum adjacent to the plunger.

Abstract: A first group of memory locations stores information. The first group is arranged into multiple congruence classes of memory locations. The congruence classes include a first congruence class having more than one memory location. A second group of memory locations stores information from the first group of memory locations. Directory locations store information relating the first and second groups of memory locations. The directory locations include a first directory location able to store information relating a particular one of the second group of memory locations to any memory location of more than one of the congruence classes including the first congruence class.

Abstract: The present invention relates to a tranformer core structure, which includes a rectangular frame core having two long sides and two short sides, with one short side having a recessed part and the other short side being closed to form a junction surface of magnetic path; and a strip core disposed in the rectangular frame core through the recessed part, and having a length similar to that of said long side of said rectangular frame core, but having a width slightly less than that of said recessed part, wherein adjustment of the inductance of the structure is accomplished by moving said strip core along said recessed part to adjust a gap between one end of said strip core and said junction surface of magnetic path.

Abstract: A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Access authority is checked to determine whether an input/output device is authorized to access that particular page. If it is not, access is denied. Each input/output device has access to a portion of the cache, so that activity by one device will not interfere with activity by another.

Abstract: A data processing method for storing groups of related information in a storage subsystem of a data processing system in which the storage subsystem includes one or more storage devices having a plurality of block addressable storage locations (blocks or sectors) each of which stores a predetermined fixed number of bytes of said information. The method includes the step of establishing allocatable increments of storage, called physical partitions, which comprise a predetermined number of contiguous addressable blocks, and initially allocating, in response to a request to the operating system, a preselected number of partitions for each group of related information, where the partitions in each group are not necessarily physically contiguous and where the number that is selected is the minimum number of partitions required to store the group of related information.

Abstract: A method and apparatus for controlling access to data blocks stored by addresses in a memory and concurrently accessible by a plurality of transactions is provided. The method includes the steps of receiving an address of a data block to be accessed by a first transaction, deriving from the address an access table entry corresponding to the data block where the entry includes lock data that governs access to the data block, and providing the access if permitted by the lock data, or providing the access, if not permitted by the lock data, and recording the occurrence of the access in the lock data.

Abstract: A memory address translation and related control system for performing the dual functions of converting virtual memory addresses generated by the CPU into real memory addresses in a highly efficient and versatile manner and for controlling certain memory functions such as journalling. The address translation function comprises two steps, the first comprising converting the virtual address into a second virtual address or an effective address and finally the step of converting the effective address into a real memory address. The first step utilizes a set of special registers addressable by a small field to the CPU generated virtual address which converts the virtual address into an expanded form. The second or effective address is then used as the subject of the second or address translation step.

Abstract: A method to logically serialize a plurality of independent system events in a virtual memory data processing system. Each event causes interrupt servicing routines to be executed and requires data structures that record the status of virtual pages to be updated. The system events include the interrupt that is generated as a result of a page fault, the interrupt that is generated as a result of a paging I/O completion operation that resolves a page fault, and lastly interrupts generated in response to a supervisory call to a paging service.