Abstract: A method comprising a computational procedure for obtaining capacitances for three-dimensional geometries which include multiple regions with different dielectric constants. The methodology is not limited to uniform dielectrics. The dielectric regions can also consist of non-uniform and/or anisotropic materials.

Abstract: A method comprising a computational procedure for obtaining reduced-order models of partial element equivalent circuit (PEEC) models of very large scale integrated (VLSI) interconnects. The methodology is not limited to PEEC applications, and can be used for generating reduced-order models of other systems which can be modeled with linear, time-invariant systems of ordinary differential equations with time delays.

Abstract: An apparatus and method is presented for capacitance analysis in chip environments for arbitrary geometries. It uses a process which combines 2-dimensional ascertainments where the length is chosen to fit the solution. Also, the required accuracy may be limited to be within an error range. The technique is also applicable for the analysis of three dimensional capacitances, and importantly also for a mixture of two and three dimensional capacitance ascertainments. In an embodiment the process divides the space into a set of subspaces. The capacitance value for the subspaces are determined using the parallel plate capacitance formula.

Abstract: A method is provided for analyzing stability and passivity of physical systems. A physical system having time delays is represented as a linear circuit model. The linear circuit model is transformed into a corresponding transform domain circuit model. Sensitivity analysis is applied to the transform domain circuit model for generating information indicative of the stability or the passivity of the physical system having the time delays. A graphical representation may be created of the information indicative of the stability or passivity of the physical system having the time delays.

Abstract: A method and computer program product are provided for implementing a stable integral equation model for both the time and frequency domains. The stabilization method of the invention is applicable to electric field integral equation (EFIE) formulations, to magnetic field integral equation (MFIE) formulations, and to combined field integral equation (CFIE) formulations. For example, an EFIE formulation can be used in the circuit domain called partial element equivalent circuit (PEEC). Each volume cell is subdivided into a finite number of partitions. A partial inductance term is calculated consisting of a summation over all the finite number of partitions in each cell. Each surface cell is subdivided into a finite number of subcells. A coefficient of potential term is calculated consisting of a summation over all the finite number of subcells in each surface cell. Both the partial inductances and the coefficients of potential are calculated without increasing the number of unknowns.