Abstract: To form an isolation structure in a semiconductor substrate, at least two trenches are formed with a rib therebetween in the semiconductor substrate, and then the semiconductor material in the area of the trenches and particularly the rib is converted to an electrically insulating material. For example, this is accomplished by thermal oxidation of silicon semiconductor material of the rib.

Abstract: The invention relates to processes for the formation of isolation structures for micro-machined sensors in single-crystal surface technology. In known processes, silicon structures defined by deep trenches are etched and uncovered by a “release etch” step also at their bottom surface towards the substrate. The subsequent lining of these trenches with a non-conducting insulating material, such as silicon dioxide leads to a firm anchoring by means of a surrounding of the silicon structure with the lined trenches on three sides, leaving one side uncovered. It is the main idea of the invention—instead of lining the trenches—to convert thin-walled silicon into an electrically non-conducting material. This can, for instance, be accomplished by means of a thermal oxidation of narrow silicon ribs released prior thereto by trenches. In the minimal configuration, two trenches (holes) per rib with the required structure depth must be etched for this purpose.

Abstract: A micromechanical enclosure suitable for micromechanical sensors, particularly acceleration sensors in the field of automotive vehicles, includes a micromechanical structure on a substrate, a conductor track layer connected to the micromechanical structure on the main surface of the substrate, a cover that covers a part of the main surface of the substrate, and a level compensation layer arranged next to the conductor track layer beneath the contact area during the manufacture of the wafer. A planarizing layer, which forms a level surface, may additionally be applied above this, to form a level area on the substrate which can easily be joined to a level area of the cover by means of a metallic wafer bond. This achieves small overall dimensions and avoids a glass frit bond.

Abstract: 1.