Abstract: Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. The regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

Abstract: A high current density, low contact resistance contact for wide bandgap (WBG) or ultra-wide bandgap materials (UWBG) is disclosed. The contact is lithographically formed so that a total perimeter length of the contact structure is at least twice the length of the side of a contact pad closest to the gate in a high electron mobility transistor (HEMT). The contact structure may take the form of a plurality of columns having various cross-sectional shapes, or may take the form of a convoluted geometrical shape, such as a comb-like, serpentine, or spiral shape. The depth of the contact structure permits direct contact with the two-dimensional electron gas (2DEG) in the HEMT by the perimeter of the contact structure. The contact structure is formed of at least one metal layer, at least one doped material regrown layer, or at least one implanted region. The contact structure may be applied to other WBG and UWBG devices.

Abstract: Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. In examples, the regrowth takes place over exposed portions of the channel layer in the source and drain regions of the device, and the regrown material has a composition different from the barrier layer. In other examples, the regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

Abstract: The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additional methods and architectures are described herein.

Abstract: An NPN double heterostructure bipolar transistor (DHBT) is disclosed with a base region comprising a layer of p-type-doped indium gallium arsenide nitride (InGaAsN) sandwiched between n-type-doped collector and emitter regions. The use of InGaAsN for the base region lowers the transistor turn-on voltage, Von, thereby reducing power dissipation within the device. The NPN transistor, which has applications for forming low-power electronic circuitry, is formed on a gallium arsenide (GaAs) substrate and can be fabricated at commercial GaAs foundries. Methods for fabricating the NPN transistor are also disclosed.

Abstract: The present invention provides a new type of semiconductor light source that can produce a high peak power output and is not injection, e-beam, or optically pumped. The present invention is capable of producing high quality coherent or incoherent optical emission. The present invention is based on current filaments, unlike conventional semiconductor lasers that are based on p-n junctions. The present invention provides a light source formed by an electron-hole plasma inside a current filament. The electron-hole plasma can be several hundred microns in diameter and several centimeters long. A current filament can be initiated optically or with an e-beam, but can be pumped electrically across a large insulating region. A current filament can be produced in high gain photoconductive semiconductor switches. The light source provided by the present invention has a potentially large volume and therefore a potentially large energy per pulse or peak power available from a single (coherent) semiconductor laser.

Abstract: A photoconductive semiconductor switch with tailored doping profile zones beneath and extending laterally from the electrical contacts to the device. The zones are of sufficient depth and lateral extent to isolate the contacts from damage caused by the high current filaments that are created in the device when it is turned on. The zones may be formed by etching depressions into the substrate, then conducting epitaxial regrowth in the depressions with material of the desired doping profile. They may be formed by surface epitaxy. They may also be formed by deep diffusion processes. The zones act to reduce the energy density at the contacts by suppressing collective impact ionization and formation of filaments near the contact and by reducing current intensity at the contact through enhanced current spreading within the zones.

Abstract: A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Abstract: A method for dry etching of transition metals. The method for dry etching of a transition metal (or a transition metal alloy such as a silicide) on a substrate comprises providing at least one nitrogen- or phosphorous-containing .pi.-acceptor ligand in proximity to the transition metal, and etching the transition metal to form a volatile transition metal/.pi.-acceptor ligand complex. The dry etching may be performed in a plasma etching system such as a reactive ion etching (RIE) system, a downstream plasma etching system (i.e. a plasma afterglow), a chemically-assisted ion beam etching (CAIBE) system or the like. The dry etching may also be performed by generating the .pi.-acceptor ligands directly from a ligand source gas (e.g. nitrosyl ligands generated from nitric oxide), or from contact with energized particles such as photons, electrons, ions, atoms, or molecules.

Abstract: A high gain, optically triggered, photoconductive semiconductor switch (PCSS) implemented in GaAs as a reverse-biased pin structure with a passivation layer above the intrinsic GaAs substrate in the gap between the two electrodes of the device. The reverse-biased configuration in combination with the addition of the passivation layer greatly reduces surface current leakage that has been a problem for prior PCSS devices and enables employment of the much less expensive and more reliable DC charging systems instead of the pulsed charging systems that needed to be used with prior PCSS devices.

Abstract: A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.

Abstract: A process for manufacturing selectively doped heterostructure field-effect transistors (SDHTs), a desired wafer structure for SDHT fabrication and a method for isolating SDHTs on the wafer are disclosed herein. The wafer has epitaxial layers grown on a substrate. The layers are: a buffer layer of GaAs, a first spacer layer of AlGaAs, a donor layer of AlGaAs, a second spacer layer of AlGaAs, a first cap layer of GaAs, an etch-stop layer of AlGaAs and a second cap layer of GaAs. A protective layer of AlGaAs may then be grown on the second cap layer to protect the second cap layer from contamination or damage. Also a superlattice may first be grown on the substrate.This invention was made with Government support under contract No. F29601-87-R-0202 awarded by the Defense Advanced Research Projects Agency, and under contract No. F33615-84-C-1570 awarded by the Air Force Wright Aeronautical Laboratories. The Government has certain rights in this invention.