Abstract: The present invention provides a method for detecting integrated circuit component failures that would normally be triggered during the final card attach step of the manufacturing process. According to the preferred embodiments of the present invention, integrated circuit modules are subjected to an environment that simulates a card attach process step. The process step that simulates the card attach process is introduced into the fabrication process prior to the standard integrated circuit reliability testing procedures, thereby inducing or accelerating failure of certain weak modules and allowing for identification of faulty modules during the subsequent reliability testing steps.

Abstract: According to the present invention, an improved method for locating particle contamination during the integrated circuit manufacturing process is disclosed. The integrated circuit wafer is grounded and then exposed to an electron beam to create an enhanced electrical potential in any conducting or semi-conducting particles embedded in the layered wafer. The embedded particle will begin to accumulate an electrical charge and will reach a certain electrical potential based on the size and composition of the particle as well as the length of exposure to the electron beam. After a sufficient charge has been accumulated in the embedded particle, the wafer is subjected to burn-in testing. Since the particles embedded in the wafer have been previously exposed to the electron beam, the standard voltages applied during burn-in testing will force a certain number of embedded particles to suffer accelerated breakdown.