Patents by Inventor Albert M. Scalise

Albert M. Scalise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9916839
    Abstract: Techniques are described for shared audio functionality between multiple computing devices, based on grouping the multiple computing devices into a device set. The devices may provide audio output, audio input, or both audio output and input. The devices may discover each other via transmitted radio signals, and the devices may be organized into one or more device sets based on location, supported functions, or other criteria. The shared audio functionality may enable a voice command received at one device in the device set to be employed for controlling audio output or other operations of other device(s) in the device set. Shared audio functionality between devices in a device set may also enable synchronized audio output through using multiple devices in the device set.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: March 13, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Albert M. Scalise, Tony David
  • Patent number: 9640067
    Abstract: Described herein are systems and methods for a media controller configured to associate data from a media device received using a media device interface with actions on the media devices. The associated data and actions may be used to build a media device interface command map. The media device interface command map may be used by the media controller to control the media device. A user interface provided by the media controller may thus be used to control disparate devices, allowing for a coordinated and consistent user experience across multiple media devices, even when they are from different manufacturers.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: May 2, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Albert M. Scalise, Jano D. Banks, Andrew S. Brenner, Christopher D. Painter
  • Patent number: 9431021
    Abstract: Techniques are described for grouping multiple computing devices into a device set to enable shared audio functionality, or other types of shared functionality, between the devices in the device set. The devices may provide audio output, audio input, or both audio output and input. The devices may discover each other via transmitted radio signals, and the devices may be organized into one or more device sets based on location, supported functions, or other criteria. A voice command received at one device in the device set may be employed to control operations of other device(s) in the device set. Shared audio functionality between devices in a device set may also enable synchronized audio output through using multiple devices in the device set.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: August 30, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Albert M. Scalise, Tony David
  • Patent number: 9398413
    Abstract: A computing device is used to acquire data and information regarding various electronic devices within a home, commercial space, or another area of interest. Locations for the electronic devices may also be determined by way of a location resource of the computing device, by user input, or through another suitable technique. Various maps may be generated that include graphical representations of the electronic devices, as well as walls, doorways, furniture, or other features within the area or space of interest. A user may amend or add various details within such a map by way of respective user interfaces presented by the computing device. The respective functions and cooperative operations of the electronic devices may be visualized and improved through such mapping.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: July 19, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Albert M. Scalise, Tony David
  • Patent number: 7359437
    Abstract: A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., encoded video data and encoded auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, alternating bursts of encoded video data and encoded auxiliary data are transmitted over each of one or more channels of the link. Other aspects of the invention are transmitters for use in encoding data for transmission over a serial link, and methods for sending encoded data over a serial link. In accordance with the invention, the data to be transmitted are encoded using a subset (sometimes referred to as a selected set of code words) of a full set of code words.
    Type: Grant
    Filed: December 24, 2001
    Date of Patent: April 15, 2008
    Assignee: Silicon Image, Inc.
    Inventors: Seung Ho Hwang, Jano Banks, Paul Daniel Wolf, Eric Lee, Baegin Sung, Albert M. Scalise
  • Patent number: 7257163
    Abstract: A system in which encoded data (e.g., encoded video and auxiliary data) are transmitted over a serial link. Other aspects of the invention are transmitters for use in encoding data for transmission over a serial link, receivers for receiving such data, and methods for sending encoded data over a serial link. Source data to be transmitted are encoded using a subset of a full set of code words. The subset consists of preferred code words. Disjoint clusters of code words in the full set are predetermined. Each cluster includes one or more of the preferred words, and optionally also at least one additional code word that is similar to a preferred word of the cluster in the sense that it is likely to be generated as a result of probable bit errors in transmission, or transmission and decoding, of such preferred word. Each preferred word of a cluster is indicative of a single source data value. Each received code word in a cluster is mapped to the source data value determined by each preferred word of the cluster.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: August 14, 2007
    Assignee: Silicon Image, Inc.
    Inventors: Seung Ho Hwang, Jano Banks, Paul Daniel Wolf, Eric Lee, William Sheet, Albert M. Scalise
  • Patent number: 7088398
    Abstract: A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., video, audio, and optionally also other auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, packets of encoded audio data are transmitted over each of one or more channels of the link during data islands between bursts of encoded video data, a pixel clock is transmitted over the link, and the receiver regenerates a clock for the audio data using time code data in the packets and the pixel clock. Other aspects of the invention are transmitters for transmitting encoded data and a pixel clock over a serial link, receivers for receiving such data and pixel clock and performing audio clock regeneration, and methods for transmitting encoded data and a pixel clock over a serial link and performing clock regeneration using the transmitted data and pixel clock.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 8, 2006
    Assignee: Silicon Image, Inc.
    Inventors: Paul Daniel Wolf, Adrian Sfarti, John D. Banks, Stephen J. Keating, Duane Siemens, Eric Lee, Albert M. Scalise, Gijung Ahn, Seung Ho Hwang, Keewook Jung
  • Patent number: 6914637
    Abstract: A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., video, audio, and optionally also other auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, packets of encoded audio data are transmitted over each of one or more channels of the link during data islands between bursts of encoded video data. Other aspects of the invention are transmitters for use in encoding data for transmission over a serial link, receivers for receiving such data, and methods for sending encoded data over a serial link.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: July 5, 2005
    Assignee: Silicon Image, Inc.
    Inventors: Paul Daniel Wolf, John D. Banks, Stephen J. Keating, Duane Siemens, Eric Lee, Albert M. Scalise, Gijung Ahn, Seung Ho Hwang, Keewook Jung, James D. Lyle, Michael Anthony Schumacher, Vladimir Grekhov
  • Publication number: 20030048852
    Abstract: A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., encoded video data and encoded auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, alternating bursts of encoded video data and encoded auxiliary data are transmitted over each of one or more channels of the link. Other aspects of the invention are transmitters for use in encoding data for transmission over a serial link, receivers for receiving such data, and methods for sending encoded data over a serial link. In accordance with the invention, source data to be transmitted are encoded using a subset of a full set of code words. The subset consists of preferred code words.
    Type: Application
    Filed: March 12, 2002
    Publication date: March 13, 2003
    Inventors: Seung Ho Hwang, Jano Banks, Paul Daniel Wolf, Eric Lee, William Sheet, Albert M. Scalise
  • Patent number: 6393505
    Abstract: A data bus arbitration system is disclosed including a bus status monitor which is coupled to a data bus and generates a bus status signal for use by an arbiter. The arbiter is coupled to a number of requesters, each of which belongs to a distinct class of requesters. The arbiter arbitrates between multiple requests using heuristics dependent upon the classes of the requesters. The nature of one class of requestors is that the requestors have real time requirements which must be met in order to maintain data integrity within the system. The nature of a second class of requestors is such that the requestors have semi-real time requirements which must be met in order to maintain data integrity within the system. The nature of the system is such that the available bandwidth must be utilized very efficiently in order to maintain data integrity within the system.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: May 21, 2002
    Assignee: DVDO, Inc.
    Inventors: Albert M. Scalise, Jano D. Banks
  • Patent number: 6385692
    Abstract: Disclosed is a SDRAM system including a SDRAM having multiple banks of memory, a plurality of bank state machines associated the multiple banks of memory of the SDRAM, and a data control state machine. The data state machine is responsive to a memory request for a variable length data transfer with the SDRAM and as well as the bank state machines. The data control state machine determines the current state of a first bank of memory of the SDRAM. The current state may be either a read in progress, a write in progress, or idle. The data control state machine then handles the memory request with a different bank of memory RAM depending upon the current state of the first bank of memory.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: May 7, 2002
    Assignee: Silicon Image, Inc.
    Inventors: Jano D. Banks, Dale R. Adams, Albert M. Scalise
  • Publication number: 20020007435
    Abstract: Disclosed is a SDRAM system including a SDRAM having multiple banks of memory, a plurality of bank state machines associated the multiple banks of memory of the SDRAM, and a data control state machine. The data state machine is responsive to a memory request for a variable length data transfer with the SDRAM and as well as the bank state machines. The data control state machine determines the current state of a first bank of memory of the SDRAM. The current state may be either a read in progress, a write in progress, or idle. The data control state machine then handles the memory request with a different bank of memory RAM depending upon the current state of the first bank of memory.
    Type: Application
    Filed: March 12, 2001
    Publication date: January 17, 2002
    Inventors: Jano D. Banks, Dale R. Adams, Albert M. Scalise
  • Patent number: 6219747
    Abstract: Disclosed is a SDRAM system including a SDRAM having multiple banks of memory, a plurality of bank state machines associated the multiple banks of memory of the SDRAM, and a data control state machine. The data state machine is responsive to a memory request for a variable length data transfer with the SDRAM and as well as the bank state machines. The data control state machine determines the current state of a first bank of memory of the SDRAM. The current state may be either a read in progress, a write in progress, or idle. The data control state machine then handles the memory request with a different bank of memory RAM depending upon the current state of the first bank of memory.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: April 17, 2001
    Inventors: Jano D. Banks, Dale R. Adams, Albert M. Scalise
  • Patent number: 5828857
    Abstract: An ASIC (Application Specific Integrated Circuit) cell implementation of an ADB (Apple Desktop Bus) bus controller with programmable timing value registers for the Apple Desktop Bus (ADB) has a system interface for connecting to a computer system including an address bus interface, a data bus interface, and a control bus interface, and has an ADB interface for connecting to an ADB peripheral bus. A control state machine within the ADB bus controller uses timing data from the programmable timing value registers to implement the Apple Desktop Bus data signaling and communications protocol on the ADB interface.
    Type: Grant
    Filed: January 5, 1996
    Date of Patent: October 27, 1998
    Assignee: Apple Computer, Inc.
    Inventor: Albert M. Scalise
  • Patent number: 5778201
    Abstract: A method for bit cell determination and timeout detection for an Apple Desktop Bus, using a counter clocked by a clock generator, according to the steps of: At the start of a bit cell, loading an initial value into the counter and enabling the counter to count down as clocked by the clock generator. Counting down until a low to high transition in the input ADB signal is detected or a terminal count is reached, such that if the low to high transition transition is detected, then enabling the counter to count up, else if the terminal count is reached, then indicating a timeout condition. If the counter is enabled to count up, then counting up until a high to low transition in the input ADB signal is detected or the terminal count is reached, such that if the high to low transition is detected, then stopping the counter and reading a final value to determine the bit cell value, else if the terminal count is reached, then indicating a timeout condition.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: July 7, 1998
    Inventor: Albert M. Scalise
  • Patent number: 5253348
    Abstract: In a bus adapter coupling a system bus and an I/O bus which operate at different speeds and contain a plurality of devices, a method by which an arbiter in the bus adapter prevents contention for ownership of both buses by a device on either of the buses. The method includes the steps of sampling each of the devices requesting ownership of said buses and asserting a bus grant to one of the devices on one of the buses based on its assigned priority number. The method also includes the step of waiting for the device granted the bus to send an acknowledge signal to display ownership of the buses and for each of the devices not on the bus containing the device granted the bus to see the acknowledge signal before resampling and reasserting a new bus grant to another of the requesting devices.
    Type: Grant
    Filed: September 25, 1992
    Date of Patent: October 12, 1993
    Assignee: Apple Computer, Inc.
    Inventor: Albert M. Scalise
  • Patent number: 5191653
    Abstract: A bi-directional bus adapter coupling a system bus, which operates at a first speed using a first protocol, and an IO bus, which operates at a second speed using a second protocol, and allowing data transfering devices on either bus to transfer data to or from devices on the other bus. The bus adapter includes a cycle generation mechanism which is responsive to data cycles from one of the buses in order to generate bus cycles needed to complete a data transfer to a device on the other bus. The bus adapter includes a synchronization mechanism for converting the plurality of data cycles generated by the cycle generation mechanism from either the first speed to the second speed or vice versa. The bus adapter includes bi-directional data path mechanism for routing data between the system and IO buses according to said protocols, such that the data path directs bytes of data to specific data lines to perform byte steering and dynamic bus sizing on the data from the system bus to the IO bus.
    Type: Grant
    Filed: December 28, 1990
    Date of Patent: March 2, 1993
    Assignee: Apple Computer, Inc.
    Inventors: John D. (J.) Banks, Kenneth M. Karakotsios, Albert M. Scalise