Patents by Inventor Albert Sanghyup Lee

Albert Sanghyup Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9607904
    Abstract: ALD of HfxAlyCz films using hafnium chloride (HfCl4) and Trimethylaluminum (TMA) precursors can be combined with post-deposition anneal processes and ALD liners to control the device characteristics in high-k metal-gate devices. Variation of the HfCl4 pulse time allows for control of the Al % incorporation in the HfxAlyCz film in the range of 10-13%. Combinatorial process tools can be employed for rapid electrical and materials characterization of various materials stacks. The effective work function (EWF) in metal oxide semiconductor capacitor (MOSCAP) devices with the HfxAlyCz work function layer coupled with ALD deposited HfO2 high-k gate dielectric layers was quantified to be mid-gap at ˜4.6 eV. Thus, HfxAlyCz is a promising metal gate work function material allowing for the tuning of device threshold voltages (Vth) for anticipated multi-Vth integrated circuit (IC) devices.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: March 28, 2017
    Assignees: Intermolecular, Inc., GLOBALFOUNDRIES, INC.
    Inventors: Albert Sanghyup Lee, Paul Besser, Kisik Choi, Edward L Haywood, Hoon Kim, Salil Mujumdar
  • Publication number: 20160181380
    Abstract: Embodiments provided herein describe systems and methods for forming semiconductor devices. A semiconductor substrate is provided. A source region and a drain region are formed on the semiconductor substrate. A gate electrode is formed between the source region and the drain region. A contact is formed above at least one of the source region and the drain region. The contact includes an insulating layer formed above the semiconductor substrate, an interface layer formed above the insulating layer, and a metallic layer formed above the interface layer. The interface layer is operable as a barrier between a material of the insulating layer and a material of the metallic layer, reduces the electrical resistance between the material of the insulating layer and the material of the metallic layer, or a combination thereof.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Amol Joshi, Sean Barstow, Paul Besser, Ashish Bodke, Guillaume Bouche, Nobumichi Fuchigami, Zhendong Hong, Shaoming Koh, Albert Sanghyup Lee, Salil Mujumdar, Abhijit Pethe, Mark Victor Raymond
  • Patent number: 9312137
    Abstract: Native oxide growth on germanium, silicon germanium, and InGaAs undesirably affects CET (capacitive equivalent thickness) and EOT (effective oxide thickness) of high-k and low-k metal-oxide layers formed on these semiconductors. Even if pre-existing native oxide is initially removed from the bare semiconductor surface, some metal oxide layers are oxygen-permeable in thicknesses below about 25 ? thick. Oxygen-containing species used in the metal-oxide deposition process may diffuse through these permeable layers, react with the underlying semiconductor, and re-grow the native oxide. To eliminate or mitigate this re-growth, the substrate is exposed to a gas or plasma reductant (e.g., containing hydrogen). The reductant diffuses through the permeable layers to react with the re-grown native oxide, detaching the oxygen and leaving the un-oxidized semiconductor. The reduction product(s) resulting from the reaction may then be removed from the substrate (e.g., driven off by heat).
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: April 12, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Frank Greer, Amol Joshi, Kevin Kashefi, Albert Sanghyup Lee, Abhijit Pethe, J Watanabe
  • Publication number: 20160035631
    Abstract: ALD of HfxAlyCz films using hafnium chloride (HfCl4) and Trimethylaluminum (TMA) precursors can be combined with post-deposition anneal processes and ALD liners to control the device characteristics in high-k metal-gate devices. Variation of the HfCl4 pulse time allows for control of the Al % incorporation in the HfxAlyCz film in the range of 10-13%. Combinatorial process tools can be employed for rapid electrical and materials characterization of various materials stacks. The effective work function (EWF) in metal oxide semiconductor capacitor (MOSCAP) devices with the HfxAlyCz work function layer coupled with ALD deposited HfO2 high-k gate dielectric layers was quantified to be mid-gap at ˜4.6 eV. Thus, HfxAlyCz is a promising metal gate work function material allowing for the tuning of device threshold voltages (Vth) for anticipated multi-Vth integrated circuit (IC) devices.
    Type: Application
    Filed: December 2, 2013
    Publication date: February 4, 2016
    Applicants: GLOBALFOUNDRIES, INC., INTERMOLECULAR INC.
    Inventors: Albert Sanghyup Lee, Paul Besser, Kisik Choi, Edward L Haywood, Hoon Kim, Salil Mujumdar
  • Publication number: 20150380309
    Abstract: Metal-insulator-semiconductor (MIS) contacts for germanium and its alloys include insulator layers of oxygen-deficient metal oxide deposited by atomic layer deposition (ALD). The oxygen deficiency reduces the tunnel barrier resistance of the insulator layer while maintaining the layer's ability to prevent Fermi-level pinning at the metal/semiconductor interface. The oxygen deficiency is controlled by optimizing one or more ALD parameters such as shortened oxidant pulses, use of less-reactive oxidants such as water, heating the substrate during deposition, TMA “cleaning” of native oxide before deposition, and annealing after deposition. Secondary factors include reduced process-chamber pressure, cooled oxidant, and shortened pulses of the metal precursor.
    Type: Application
    Filed: June 26, 2014
    Publication date: December 31, 2015
    Inventors: Salil Mujumdar, Amol Joshi, Kevin Kashefi, Albert Sanghyup Lee, Abhijit Pethe, Bin Yang
  • Publication number: 20150118828
    Abstract: Native oxide growth on germanium, silicon germanium, and InGaAs undesirably affects CET (capacitive equivalent thickness) and EOT (effective oxide thickness) of high-k and low-k metal-oxide layers formed on these semiconductors. Even if pre-existing native oxide is initially removed from the bare semiconductor surface, some metal oxide layers are oxygen-permeable in thicknesses below about 25 ? thick. Oxygen-containing species used in the metal-oxide deposition process may diffuse through these permeable layers, react with the underlying semiconductor, and re-grow the native oxide. To eliminate or mitigate this re-growth, the substrate is exposed to a gas or plasma reductant (e.g., containing hydrogen). The reductant diffuses through the permeable layers to react with the re-grown native oxide, detaching the oxygen and leaving the un-oxidized semiconductor. The reduction product(s) resulting from the reaction may then be removed from the substrate (e.g., driven off by heat).
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: Intermolecular Inc.
    Inventors: Frank Greer, Amol Joshi, Kevin Kashefi, Albert Sanghyup Lee, Abhijit Pethe, J Watanabe
  • Patent number: 8846484
    Abstract: Systems and methods for preparing resistive switching memory devices such as resistive random access memory (ReRAM) devices wherein both oxide and nitride layers are deposited in a single chamber are provided. Various oxide and nitride based layers in the ReRAM device such as the switching layer, current-limiting layer, and the top electrode (and optionally the bottom electrode) are deposited in the single chamber. By fabricating the ReRAM device in a single chamber, throughput is increased and cost is decreased. Moreover, processing in a single chamber reduces device exposure to air and to particulates, thereby minimizing device defects.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: September 30, 2014
    Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventors: Albert Sanghyup Lee, Chien-Lan Hsueh, Tim Minvielle, Takeshi Yamaguchi
  • Publication number: 20140284545
    Abstract: A resistive memory device having an in-situ nitride initiation layer is disclosed. The nitride initiation layer is formed above the first electrode, and the metal oxide switching layer is formed above the nitride initiation layer to prevent oxidation of the first electrode. The nitride initiation layer may be a metal nitride layer that is formed by atomic layer deposition in the same chamber in which the metal oxide switching layer is formed. The nitride initiation layer and metal oxide switching layer may alternatively be formed in a chemical vapor deposition (CVD) chamber or a physical vapor deposition (PVD) chamber.
    Type: Application
    Filed: April 23, 2014
    Publication date: September 25, 2014
    Applicants: Intermolecular Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLC
    Inventor: Albert Sanghyup Lee