Abstract: An integrated circuit lead assembly structure is disclosed which comprises one or more pc boards, having a first lead pattern adjacent one surface of a pc board and a second lead pattern adjacent another surface of a pc board with at least a portion of the leads of the first lead pattern running perpendicular to corresponding leads of the second lead pattern to reduce crosstalk and coupling between the leads. An array of bonding pads is provided on one surface of the structure together with a die mounting area and electrical connection is made from the bonding pads to leads not on the same surface through vias or plated-through holes which respectively pass through the structure from the bonding pad to the appropriate lead. When a laminate of several pc boards is used, power and/or ground electrodes may be provided on other surfaces and also electrically connected to one or more bonding pads.

Abstract: A pin grid array package structure includes a package body member (12), a wiring board (14) having a central portion for receiving a semiconductor chip (18), a tape lead circuit (16), and a cover member (22). A plurality of metal terminal pins (24) extend substantially over the entire top and bottom surfaces of the body member (12). The terminal pins extend from a bottom surface of the body member (12) and protrude slightly above a top surface thereof to form terminal pin ends (30). The wiring board (14) is placed over the body member (12) for engagement with the terminal pin ends (30). The wiring board (14) has a metalized trace pattern deposited on its top surface. The wiring board further includes an outer lead bonding area (34a) of a rectangular shape which is disposed in spaced apart surrounding relationship with the chip (18). The outer lead bonding area (34a) is formed with bonding pads (42a).