Patents by Inventor Albert Van De Goor

Albert Van De Goor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Analogue measurement of alignment between layers of a semiconductor device
    Patent number: 7688083
    Abstract: A method of obtaining parametric test data for use in monitoring alignment between layers of a semiconductor device. The method employs a test structure comprising a meander (10, 30) of the material of a first layer of the semiconductor device, deposited relative to a conductive line (18,38). A number of sets (16a, 16b, 16e, 16d) of components 16, such as contacts or vias, are provided relative to the meander (10), at successively smaller distances therefrom. A single analogue measurement can be performed between a first and (A) of the meander (10, 30) and the conductive line (18, 38) so as to determine the resistance therebetween, and the critical distance at (or on acceptable margin in relation thereto) between the first layer and a component of the semiconductor device can be obtained.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: March 30, 2010
    Assignee: NXP B.V.
    Inventors: Dirk Kenneth De Vries, Albert Van De Goor
  • ANALOGUE MEASUREMENT OF ALIGNMENT BETWEEN LAYERS OF A SEMICONDUCTOR DEVICE
    Publication number: 20090009196
    Abstract: A method of obtaining parametric test data for use in monitoring alignment between layers of a semiconductor device. The method employs a test structure comprising a meander (10, 30) of the material of a first layer of the semiconductor device, deposited relative to a conductive line (18,38). A number of sets (16a, 16b, 16e, 16d) of components 16, such as contacts or vias, are provided relative to the meander (10), at successively smaller distances therefrom. A single analogue measurement can be performed between a first and (A) of the meander (10, 30) and the conductive line (18, 38) so as to determine the resistance therebetween, and the critical distance at (or on acceptable margin in relation thereto) between the first layer and a component of the semiconductor device can be obtained.
    Type: Application
    Filed: September 19, 2005
    Publication date: January 8, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Dirk Kenneth De Vries, Albert Van De Goor