Abstract: SOI islands having doped edges are formed by providing over the surface of a layer of single crystalline silicon on an insulating substrate a masking layer formed of two layers, the lowermost layer adjacent the silicon layer being silicon oxide and the uppermost layer being silicon nitride. The masking layer is defined using standard photolithographic techniques and etching to form the masking layer over only the areas of the silicon layer which are to form the islands. The uncovered portion of the silicon layer is then removed by etching to form the islands. The lowermost layer of the masking layer is then etched laterally away from the edges of the island to expose a portion of the surface of the silicon layer adjacent the edges of the islands. After removing the uppermost layer of the masking layer, the exposed edge portions of the surface of the silicon layer are doped by ion implantation to form the islands with doped edges.

Abstract: Large areas of metallization on a semiconductor surface are replaced with an interconnected pattern of metallization. When an area of metallization is covered with a layer of dielectric glass having a thermal coefficient of expansion substantially different from that of the metallization, use of the subject interconnected pattern of metallization significantly enhances the stability of the structure to thermal stress.

Abstract: A semiconductor device having a multi-level metallization system wherein the first level is of aluminum containing up to 3 of percent silicon and the second level is either aluminum or aluminum containing silicon in an amount less than that contained in the first level. The two levels where they contact each other are sintered together with some of the silicon from the first level being diffused into the second level so that the second level has a region adjacent the junction between the two levels which has a higher content of silicon than the remaining portion of the second level. When making the device, the surface of the first level where it is to be joined with the second level is etched to remove some of the aluminum, but not the silicon, which roughens this surface. The second level is applied on this roughened surface and the device is heated to sinter the two levels together and diffuse the silicon into the second level.

Abstract: The formation of silicon dioxide isolated silicon islands on the surface of a substrate is improved by utilizing as an oxidation mask a patterned layer of silicon nitride which is deposited by LPCVD directly onto the surface of the silicon wafer. The subject method substantially reduces the incidence of stress related defects in the silicon surface and therefore eliminates the need for a layer of pad oxide which, if present, would cause "bird's beak" formation.

Abstract: The method provides an extremely fast and non-destructive method for determining whether an integrated circuit will have good bonding characteristics. The method entails immersion plating of copper onto aluminum areas. Then, the aluminum areas are observed visually to see if the copper plated thereon is continuous or discontinuous. If the copper is discontinuous, the aluminum film will have good bonding characteristics.

Abstract: The method entails laying out NPN transistors in a bipolar integrated circuit in a manner which prevents crystal dislocations from making the transistor unreliable. The long edges of the collector contacts are aligned in a direction substantially perpendicular to the direction between the collector contact and the emitter-base junction.

Abstract: A method of chemically vapor-depositing a low-stress glass layer onto a substrate which is heated in an atmosphere including silane, oxygen, and an inert carrier gas, comprises the step of adding water vapor to the atmosphere to increase the water vapor content of the atmosphere substantially above that normally present therein from the oxidation of the silane.