Abstract: Described here are systems and methods for controlling IC engines. In one aspect, a method for controlling a fuel processor is provided, the method including i) determining a temperature of an exhaust flow to the fuel processor, the fuel processor including a fuel processor catalyst; ii) determining a concentration of O2 in the exhaust flow upstream of the fuel processor catalyst; iii) determining a rate of the exhaust flow; and iv) adjusting a fuel flow rate to the fuel processor based on i), ii), iii) and a heat capacity value associated with the fuel processor. In other aspects, a system comprising logic operable to control a fuel processor is provided.

Abstract: Described here are systems and methods for controlling IC engines. In one aspect, a method for controlling a fuel processor is provided, the method including i) determining a temperature of an exhaust flow to the fuel processor, the fuel processor including a fuel processor catalyst; ii) determining a concentration of O2 in the exhaust flow upstream of the fuel processor catalyst; iii) determining a rate of the exhaust flow; and iv) adjusting a fuel flow rate to the fuel processor based on i), ii), iii) and a heat capacity value associated with the fuel processor. In other aspects, a system comprising logic operable to control a fuel processor is provided.

Abstract: A TDM PCM telephone system and a telephone user terminal are interconnected by a digital subscriber loop circuit which provides at least a single channel communication path for digital signals of data or encoded voice origin. The digital subscriber loop circuit includes transmit and receive paths and a line interface circuit. The line interface circuit converts a selected channel of binary signals appearing at a subscriber line port of the telephone system into a corresponding bipolar return to zero (BPRZ) signals for transmission on the receive signal path. The line interface circuit also converts BPRZ signals from the transmit signal path to corresponding binary signals. These binary signals are accumulated and stored. At a time coincident with the selected channel occurrence, the line interface circuit transmits the stored signals to the subscriber line port for acceptance by the telephone system.

Abstract: A digital clock recovery circuit in which the phase of the divider chain driven by a local clock is controlled in order to maintain its output (the recovered clock signal) in synchronization with the incoming data stream. Additional control circuitry is included to inhibit phase correction when the relative phase of the two signals is within certain limits. Also phase correction takes place only after several indications one signal is leading or lagging the other, to prevent any correction due to noise.

Abstract: An analog-to-digital converter employing a sample-hold, ramp generator and comparator in the conversion process combines the sample-hold and integrate functions in one operational amplifier. Provision may be made to derive the reference voltage, for the ramp generator, from the analog signal whereby automatic gain control is also obtained.