Patents by Inventor Alberto Iorio

Alberto Iorio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936689
    Abstract: A method for transmitting messages on a communications network on board a vehicle between a requesting entity requesting a service instance and an offering entity offering a service instance using a Service Oriented MiddlewarE over Internet Protocol (SOME/IP) communication protocol is provided.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: March 19, 2024
    Assignees: POLITECNICO DI TORINO, ITALDESIGN-GIUGIARO S.P.A.
    Inventors: Fulvio Risso, Fulvio Valenza, Riccardo Sisto, Marco Iorio, Massimo Reineri, Alberto Buttiglieri
  • Patent number: 11817791
    Abstract: A synchronous rectifier driver circuit is configured to drive a synchronous rectifier FET and includes a first terminal configured to be connected to a source terminal of the synchronous rectifier FET. A second terminal is configured to be connected to a drain terminal of the synchronous rectifier FET, and a third terminal is configured to be connected to a gate terminal of the synchronous rectifier FET. The synchronous rectifier driver circuit is configured to measure the voltage between the second terminal and the first terminal, and detect a switch-on instant in which the measured voltage reaches a first threshold value and a switch-off instant in which the measured voltage reaches a second threshold value. The synchronous rectifier driver circuit generates a drive signal between the third terminal and the first terminal as a function of the measured voltage.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: November 14, 2023
    Assignees: STMicroelectronics S.r.l., STMicroelectronics Design and Application S.R.O.
    Inventors: Alberto Iorio, Maurizio Foresta, Emilio Volpi, Jan Novotny
  • Publication number: 20220109375
    Abstract: A synchronous rectifier driver circuit is configured to drive a synchronous rectifier FET and includes a first terminal configured to be connected to a source terminal of the synchronous rectifier FET. A second terminal is configured to be connected to a drain terminal of the synchronous rectifier FET, and a third terminal is configured to be connected to a gate terminal of the synchronous rectifier FET. The synchronous rectifier driver circuit is configured to measure the voltage between the second terminal and the first terminal, and detect a switch-on instant in which the measured voltage reaches a first threshold value and a switch-off instant in which the measured voltage reaches a second threshold value. The synchronous rectifier driver circuit generates a drive signal between the third terminal and the first terminal as a function of the measured voltage.
    Type: Application
    Filed: September 30, 2021
    Publication date: April 7, 2022
    Applicants: STMicroelectronics S.r.l., STMicroelectronics Design and Application S.R.O.
    Inventors: Alberto IORIO, Maurizio FORESTA, Emilio VOLPI, Jan NOVOTNY
  • Patent number: 10819245
    Abstract: A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: October 27, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Emilio Volpi, Jeanpierre Vicquery
  • Publication number: 20200336071
    Abstract: A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Inventors: Alberto Iorio, Emilio Volpi, Jeanpierre Vicquery
  • Patent number: 10686361
    Abstract: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: June 16, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Iorio, Maurizio Foresta
  • Patent number: 10491118
    Abstract: A voltage comparator for detecting a voltage difference in a high-voltage domain, wherein said comparator receives an input voltage and compares it with a reference voltage also received in input, in which the output voltage from the comparator assumes the logic value 1 if the input voltage is greater than the reference voltage and assumes the logic value 0 if the input voltage is less than or equal to the reference voltage, wherein said comparator comprises low-voltage components and a single high-voltage component. In particular, the low-voltage components are MOS transistors and the high-voltage component is a high-voltage PMOS.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: November 26, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Iorio, Jeanpierre Vicquery, Emilio Volpi
  • Publication number: 20190214898
    Abstract: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Inventors: Alberto IORIO, Maurizio FORESTA
  • Patent number: 10277107
    Abstract: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: April 30, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Iorio, Maurizio Foresta
  • Patent number: 10224824
    Abstract: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 5, 2019
    Assignee: STMicroelectronics S.R.L.
    Inventors: Alberto Iorio, Maurizio Foresta
  • Publication number: 20180212524
    Abstract: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventors: Alberto Iorio, Maurizio Foresta
  • Patent number: 9960692
    Abstract: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 1, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Maurizio Foresta
  • Publication number: 20180097447
    Abstract: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Alberto Iorio, Maurizio Foresta
  • Publication number: 20180091052
    Abstract: A voltage comparator for detecting a voltage difference in a high-voltage domain, wherein said comparator receives an input voltage and compares it with a reference voltage also received in input, in which the output voltage from the comparator assumes the logic value 1 if the input voltage is greater than the reference voltage and assumes the logic value 0 if the input voltage is less than or equal to the reference voltage, wherein said comparator comprises low-voltage components and a single high-voltage component. In particular, the low-voltage components are MOS transistors and the high-voltage component is a high-voltage PMOS.
    Type: Application
    Filed: March 13, 2017
    Publication date: March 29, 2018
    Inventors: Alberto Iorio, Jeanpierre Vicquery, Emilio Volpi
  • Patent number: 9929659
    Abstract: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: March 27, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maurizio Foresta, Alberto Iorio
  • Publication number: 20170085188
    Abstract: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 23, 2017
    Inventors: Maurizio Foresta, Alberto Iorio
  • Patent number: 9431912
    Abstract: A control device controls a rectifier of a switching converter that is supplied with an input voltage and provides an output current. The rectifier is configured to rectify the output current of the converter and has at least one transistor. The control device, when the at least one transistor is turned off, provides a slow discharge path to ground in a normal operation condition and provides a fast discharge path to ground for discharging the control terminal of the at least one transistor in response to detecting a zero cross event of the current flowing through said at least one transistor.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: August 30, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Jeanpierre Vicquery
  • Patent number: 9356535
    Abstract: A control device for a transistor of a switching converter rectifier generates a control signal of the transistor and includes a circuit to measure the conduction time of the body diode of the transistor cycle by cycle. When the conduction time is greater than a first threshold, the off time instant of the transistor is delayed by a first quantity in the next cycles, until the conduction time is less than the first threshold and greater than a second threshold. When the conduction time is between the first and second thresholds, the off time instant is delayed by a fixed second quantity in the next cycles until the conduction time is lower than the second threshold, with the second quantity less than the first quantity. When the conduction time is lower than the second threshold, the off time instant is advanced by the second quantity in the next cycle.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: May 31, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Giuseppe Scappatura, Alberto Bianco, Claudio Adragna, Silvio De Simone, Maurizio Foresta
  • Patent number: 9240728
    Abstract: A control device detects zero crossings of a current through a rectifier transistor during plural cycles; generates a turn-on signal of the transistor and inserts a turn-on delay equal to a fixed first quantity from the start time of for each cycle. The control device starts counting consecutive cycles after inserting the turn-on delay; detects whether a zero crossing of the current through the transistor after turning on said transistor has occurred; if no zero crossing is detected before counting a number N of consecutive cycles, decreases the turn-on delay by a fixed second quantity for the next cycle; if a zero crossing is detected, maintains turned on the transistor; if the turn-on delay is smaller than first quantity, increases the turn-on delay o for the next switching cycle; and if the turn-on delay is equal to the first quantity, maintains the turn-on delay for the next switching cycle.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 19, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Maurizio Foresta, Alberto Bianco
  • Patent number: 9209703
    Abstract: A control device for a rectifier of a switching converter that includes a rectifier with at least one MOS transistor and a control device that is configured to generate a turn on and off signal for the at least one transistor. The control device also includes a measuring circuit to measure the conduction time of the body diode of the at least one transistor during each converter switching half-cycle. The control device is configured to, cycle by cycle: verify if the drain-source voltage of the at least one transistor is greater or less than a voltage threshold, and if the drain-source voltage is greater than the voltage threshold to turn off the at least one transistor, measure the conduction time of the body diode and increase the voltage threshold by a quantity in the next switching cycle.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: December 8, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Maurizio Foresta