Patents by Inventor Alberto Poma
Alberto Poma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8461977Abstract: An electronic circuit includes a node coupled to a load to be driven, and a power device, which can be switched between activation and deactivation and coupled to the node. The circuit further includes a current generator having an output connected to the node and that can be enabled to generate current at least when the power device is deactivated. The circuit also includes a comparator for comparing an electric voltage of the node with a reference voltage and is configured to generate a comparison signal based thereon.Type: GrantFiled: July 27, 2010Date of Patent: June 11, 2013Assignee: STMicroelectronics S.R.L.Inventors: Matteo Amighini, Alberto Poma, Giuseppe Di Biase, Vanni Poletto
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Publication number: 20110025282Abstract: An electronic circuit includes a node coupled to a load to be driven, and a power device, which can be switched between activation and deactivation and coupled to the node. The circuit further includes a current generator having an output connected to the node and that can be enabled to generate current at least when the power device is deactivated. The circuit also includes a comparator for comparing an electric voltage of the node with a reference voltage and is configured to generate a comparison signal based thereon.Type: ApplicationFiled: July 27, 2010Publication date: February 3, 2011Applicant: STMicroelectronics S.r.l.Inventors: Matteo Amighini, Alberto Poma, Giuseppe Di Biase, Vanni Poletto
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Patent number: 6741845Abstract: A wave-shaper device having an output terminal for providing a first periodic analog signal with a first frequency, the wave-shaper device including an oscillator having an output terminal for providing a second periodic analog signal with a second frequency which is multiple with an even factor of the first frequency, and means for obtaining the first analog signal from the second analog signal.Type: GrantFiled: June 23, 2000Date of Patent: May 25, 2004Assignee: STMicroelectronics S.r.l.Inventors: Vanni Poletto, Alberto Poma
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Patent number: 6469561Abstract: A rectifying integrator of an input signal with full output dynamics, relative to a voltage reference intermediate with respect to the dynamics of the input signal, includes a first line of integration having at least one integrator for integrating that portion of the input signal that exceeds the voltage reference, and includes a hold capacitor coupled in cascade to the integrator. The rectifying integrator includes a second line of integration, identical to the first line of integration, for integrating that portion of the input signal that remains below the voltage reference. An adder output stage generates an output signal equal to the difference between the voltages existing on the hold capacitors of the first and second lines of integration.Type: GrantFiled: July 20, 2001Date of Patent: October 22, 2002Assignee: STMicroelectronics S.r.l.Inventors: Elena Pernigotti, Alberto Poma, Carlo Protti
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Publication number: 20020070787Abstract: A rectifying integrator of an input signal with full output dynamics, relative to a voltage reference intermediate with respect to the dynamics of the input signal, includes a first line of integration having at least one integrator for integrating that portion of the input signal that exceeds the voltage reference, and includes a hold capacitor coupled in cascade to the integrator. The rectifying integrator includes a second line of integration, identical to the first line of integration, for integrating that portion of the input signal that remains below the voltage reference. An adder output stage generates an output signal equal to the difference between the voltages existing on the hold capacitors of the first and second lines of integration.Type: ApplicationFiled: July 20, 2001Publication date: June 13, 2002Applicant: STMicroelectronics S.r.l.Inventors: Elena Pernigotti, Alberto Poma, Carol Protti
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Patent number: 6040736Abstract: A voltage-regulator circuit with a low voltage drop uses a DMOS power transistor driven by a charge pump. The control circuit includes two feedback loops: a first feedback loop having a high gain and accuracy but low response speed, and a second feedback loop having a wide passband and fast response speed, but low gain.Type: GrantFiled: December 4, 1997Date of Patent: March 21, 2000Assignees: SGS-Thomson Microelectronics S.r.l., Magneti Marelli S.p.A.Inventors: Andrea Milanesi, Vanni Poletto, Alberto Poma, Marco Morelli
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Patent number: 5920255Abstract: The electronic interface circuit can perform ratiometric processing and driving of a signal generated by a fuel-level detector of a vehicle. The circuit uses a current mirror configured so as to send one half of the output current to the input resistance and one half of the output current to earth. The current mirror is controlled by a voltage taken from the input resistance and by a voltage taken from a resistive divider, the latter voltage having been filtered by a low-pass filter, so as to achieve ratiometric processing of the input signal.Type: GrantFiled: July 29, 1997Date of Patent: July 6, 1999Assignees: SGS-Thomson Microelectronics, S.r.l., Magneti Marelli S.p.A.Inventors: Vanni Poletto, Alberto Poma, Marco Morelli
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Patent number: 5912617Abstract: A circuit for controlling the reserve lamp of a vehicle's fuel level indicator instrument. The circuit uses a switch controlled by an extremely asymmetric clock signal periodically to switch, for a very short time, the signal provided by the level sensor coupled to a comparator operable to compare this signal with a threshold value for the purpose of determining the state of the reserve lamp.Type: GrantFiled: September 15, 1997Date of Patent: June 15, 1999Assignees: SGS-Thomson Microelectronics S.r.l., Magneti Marelli S.p.A.Inventors: Vanni Poletto, Alberto Poma, Marco Morelli
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Patent number: 5519397Abstract: The present invention relates to a circuit for processing the output signal from a resistive analog sensor, comprising firstly a digital filter, and secondly a module forming a digital-to-impedance converter, which filter and module are interposed in series between the output of the sensor and the input of an associated load, the digital-to-impedance converter presenting an output impedance that is variable as a function of the output signal from the digital filter, which is equivalent to the output resistance of the sensor.Type: GrantFiled: February 24, 1994Date of Patent: May 21, 1996Inventors: Michel Chapotot, Bernard Marteau, Vanni Poletto, Alberto Poma, Xavier Philippon
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Patent number: 5404053Abstract: An improved circuit for controlling the maximum current in a MOS power transistor, in which resistor is in series with the drain-source path of the MOS power transistor. The supply terminal of a transconductance operational amplifier is connected to the output of a voltage-raising or charge pump circuit which can output a voltage higher than that of the voltage supply to which the drain of the MOS transistor is connected. The inputs of the amplifier are connected to the resistor and its output is connected to the gate of the MOS transistor so that, in operation, the maximum current flowing through the power transistor is limited to a value proportional to a reference voltage.Type: GrantFiled: June 9, 1993Date of Patent: April 4, 1995Assignee: SGS-Thomson Microelectronics, S.r.l.Inventors: Alberto Poma, Vanni Poletto, Marco Morelli
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Patent number: 5309347Abstract: An H-bridge circuit which includes four power transistors (an npn pull-down and a pnp pull-up for each of the output terminals). Two control circuits are connected to drive these transistors in a complementary crossover configuration, so that each control circuit can turn on the pull-up transistor on one side of the load and the pull-down transistor on the opposite side of the load. Each of the power transistors is paralleled (base-to-base) by a smaller transistor which provides a scaled current output (proportional to that of the corresponding power transistor) to the opposite control circuit. The control circuit includes static current-thresholding disable logic, which prevents turn-on until the currents through the opposite power devices have declined to threshold levels. Thus, as long as either control circuit is driving one of the pull-up transistors into in the on-state, the other control circuit will not be able to turn on the pull-down transistor which is in series with the active pull-up transistor.Type: GrantFiled: September 18, 1992Date of Patent: May 3, 1994Assignees: SGS-Thomson Microelectronics S.R.L., Marelli Autronica S.p.A.Inventors: Alberto Poma, Vanni Poletto, Marco Morelli