Patents by Inventor Alberto Salleo
Alberto Salleo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7358530Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.Type: GrantFiled: December 12, 2003Date of Patent: April 15, 2008Assignee: Palo Alto Research Center IncorporatedInventors: William S. Wong, Jeng Ping Lu, Alberto Salleo, Michael L. Chabinyc, Raj B. Apte, Robert A. Street
-
Patent number: 7223700Abstract: A method and system for masking a surface to be etched is described. The method includes the operation of heating a phase-change masking material and using a droplet source to eject droplets of a masking material for deposit on a thin-film or other substrate surface to be etched. The temperature of the thin-film or substrate surface is controlled such that the droplets rapidly freeze after upon contact with the thin-film or substrate surface. The thin-film or substrate is then treated to alter the surface characteristics, typically by depositing a self assembled monolayer on the surface. After deposition, the masking material is removed. A material of interest is then deposited over the substrate such that the material adheres only to regions not originally covered by the mask such that the mask acts as a negative resist. Using such techniques, feature sizes of devices smaller than the smallest droplet printed may be fabricated.Type: GrantFiled: October 14, 2005Date of Patent: May 29, 2007Assignee: Palo Alto Research Center IncorporatedInventors: William S. Wong, Steven E. Ready, Stephen D. White, Alberto Salleo, Michael L. Chabinyc
-
Publication number: 20060279018Abstract: A method of patterning soluble materials on a substrate is described. In the method, a stamp is applied to a liquid carrier solution. The raised areas of the stamp removes mainly a liquid carrier leaving behind a precipitate while the non-raised areas of the stamp lifts both the liquid carrier and the precipitate from the substrate. The result is a precipitate pattern residue that matches the raised area of the stamp. One use of the method is for patterning large areas of polymers used in large area electronics such as displays and sensors.Type: ApplicationFiled: August 22, 2006Publication date: December 14, 2006Inventors: Alberto Salleo, William Wong
-
Patent number: 7125495Abstract: Two different processing techniques are utilized to respectively form high resolution features and low resolution features in a critical layer of an electronic device, and in particular a large area electronic device. High resolution features are formed by soft lithography, and low resolution features are formed by jet-printing or using a jet-printed etch mask. Jet-printing is also used to stitch misaligned structures. Alignment marks are generated with the features to coordinate the various processing steps and to automatically control the stitching process. Thin-film transistors are formed by generating gate structures using a first jet-printed etch mask, forming source/drain electrodes using soft lithography, forming interconnect structures using a second jet-printed etch mask, and then depositing semiconductor material over the source/drain electrodes.Type: GrantFiled: December 20, 2004Date of Patent: October 24, 2006Assignee: Palo Alto Research Center, Inc.Inventors: Robert A. Street, William S. Wong, Alberto Salleo, Michael L. Chabinyc
-
Patent number: 7114448Abstract: A method of patterning soluble materials on a substrate is described. In the method, a stamp is applied to a liquid carrier solution. The raised areas of the stamp removes mainly a liquid carrier leaving behind a precipitate while the non-raised areas of the stamp lifts both the liquid carrier and the precipitate from the substrate. The result is a precipitate pattern residue that matches the raised area of the stamp. One use of the method is for patterning large areas of polymers used in large area electronics such as displays and sensors.Type: GrantFiled: November 6, 2003Date of Patent: October 3, 2006Assignee: Palo Alto Research Center, IncorporatedInventors: Alberto Salleo, William S. Wong
-
Publication number: 20060131266Abstract: Two different processing techniques are utilized to respectively form high resolution features and low resolution features in a critical layer of an electronic device, and in particular a large area electronic device. High resolution features are formed by soft lithography, and low resolution features are formed by jet-printing or using a jet-printed etch mask. Jet-printing is also used to stitch misaligned structures. Alignment marks are generated with the features to coordinate the various processing steps and to automatically control the stitching process. Thin-film transistors are formed by generating gate structures using a first jet-printed etch mask, forming source/drain electrodes using soft lithography, forming interconnect structures using a second jet-printed etch mask, and then depositing semiconductor material over the source/drain electrodes.Type: ApplicationFiled: December 20, 2004Publication date: June 22, 2006Applicant: Palo Alto Research Center IncorporatedInventors: Robert Street, William Wong, Alberto Salleo, Michael Chabinyc
-
Publication number: 20060131563Abstract: Composite films formed from blends of semiconducting and insulating materials that phase separate on patterned substrates are provided. Phase separation provides isolated and encapsulated areas of semiconductor on the substrate. Processes for preparing and using such composite films are also provided, along with devices including such composite films.Type: ApplicationFiled: December 20, 2004Publication date: June 22, 2006Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Alberto Salleo, Ana Arias, William Wong
-
Publication number: 20060057851Abstract: A method and system for masking a surface to be etched is described. The method includes the operation of heating a phase-change masking material and using a droplet source to eject droplets of a masking material for deposit on a thin-film or other substrate surface to be etched. The temperature of the thin-film or substrate surface is controlled such that the droplets rapidly freeze after upon contact with the thin-film or substrate surface. The thin-film or substrate is then treated to alter the surface characteristics, typically by depositing a self assembled monolayer on the surface. After deposition, the masking material is removed. A material of interest is then deposited over the substrate such that the material adheres only to regions not originally covered by the mask such that the mask acts as a negative resist. Using such techniques, feature sizes of devices smaller than the smallest droplet printed may be fabricated.Type: ApplicationFiled: October 14, 2005Publication date: March 16, 2006Inventors: William Wong, Steven Ready, Stephen White, Alberto Salleo, Michael Chabinyc
-
Patent number: 6972261Abstract: A method and system for masking a surface to be etched is described. The method includes the operation of heating a phase-change masking material and using a droplet source to eject droplets of a masking material for deposit on a thin-film or other substrate surface to be etched. The temperature of the thin-film or substrate surface is controlled such that the droplets rapidly freeze after upon contact with the thin-film or substrate surface. The thin-film or substrate is then treated to alter the surface characteristics, typically by depositing a self assembled monolayer on the surface. After deposition, the masking material is removed. A material of interest is then deposited over the substrate such that the material adheres only to regions not originally covered by the mask such that the mask acts as a negative resist. Using such techniques, feature sizes of devices smaller than the smallest droplet printed may be fabricated.Type: GrantFiled: June 27, 2002Date of Patent: December 6, 2005Assignee: Xerox CorporationInventors: William S. Wong, Steven E. Ready, Stephen D. White, Alberto Salleo, Michael L. Chebinyc
-
Publication number: 20050258428Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.Type: ApplicationFiled: July 25, 2005Publication date: November 24, 2005Inventors: William Wong, Jeng Lu, Alberto Salleo, Michael Chabinyc, Raj Apte, Robert Street
-
Publication number: 20050208695Abstract: An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer is located between the first and the second electrical contacts, forming an electrically insulating layer over the dielectric layer and the first electrical contact, exposing the first and second electrical contact, the dielectric layer and a first portion of the electrically insulating layer to radiation from the side of the first electrical contact, removing a second portion of the electrically insulating layer that was not irradiated by the radiation, providing a semiconductor material over a portion of the dielectric layer, and forming at least a third electrical contact over at least a portion of the electrically insulting layer and the semiconductor material.Type: ApplicationFiled: March 4, 2005Publication date: September 22, 2005Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Michael Chabinyc, Alberto Salleo, William Wong
-
Patent number: 6921679Abstract: An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer is located between the first and the second electrical contacts, forming an electrically insulating layer over the dielectric layer and the first electrical contact, exposing the first and second electrical contact, the dielectric layer and a first portion of the electrically insulating layer to radiation from the side of the first electrical contact, removing a second portion of the electrically insulating layer that was not irradiated by the radiation, providing a semiconductor material over a portion of the dielectric layer, and forming at least a third electrical contact over at least a portion of the electrically insulating layer and the semiconductor material.Type: GrantFiled: December 19, 2003Date of Patent: July 26, 2005Assignee: Palo Alto Research Center IncorporatedInventors: Michael L Chabinyc, Alberto Salleo, William S. Wong
-
Publication number: 20050133788Abstract: An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer is located between the first and the second electrical contacts, forming an electrically insulating layer over the dielectric layer and the first electrical contact, exposing the first and second electrical contact, the dielectric layer and a first portion of the electrically insulating layer to radiation from the side of the first electrical contact, removing a second portion of the electrically insulating layer that was not irradiated by the radiation, providing a semiconductor material over a portion of the dielectric layer, and forming at least a third electrical contact over at least a portion of the electrically insulating layer and the semiconductor material.Type: ApplicationFiled: December 19, 2003Publication date: June 23, 2005Applicant: PALO ALTO RESEARCH CENTER, INCORPORATEDInventors: Michael Chabinyc, Alberto Salleo, William Wong
-
Publication number: 20050127357Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.Type: ApplicationFiled: December 12, 2003Publication date: June 16, 2005Inventors: William Wong, Jeng Lu, Alberto Salleo, Michael Chabinyc, Raj Apte, Robert Street
-
Publication number: 20050112433Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.Type: ApplicationFiled: November 24, 2003Publication date: May 26, 2005Inventors: Raj Apte, David Duff, Christian Van de Walle, Jeng Lu, Alberto Salleo, Stephen White
-
Publication number: 20050098537Abstract: A method of patterning soluble materials on a substrate is described. In the method, a stamp is applied to a liquid carrier solution. The raised areas of the stamp removes mainly a liquid carrier leaving behind a precipitate while the non-raised areas of the stamp lifts both the liquid carrier and the precipitate from the substrate. The result is a precipitate pattern residue that matches the raised area of the stamp. One use of the method is for patterning large areas of polymers used in large area electronics such as displays and sensors.Type: ApplicationFiled: November 6, 2003Publication date: May 12, 2005Inventors: Alberto Salleo, William Wong
-
Publication number: 20040002225Abstract: A method and system for masking a surface to be etched is described. The method includes the operation of heating a phase-change masking material and using a droplet source to eject droplets of a masking material for deposit on a thin-film or other substrate surface to be etched. The temperature of the thin-film or substrate surface is controlled such that the droplets rapidly freeze after upon contact with the thin-film or substrate surface. The thin-film or substrate is then treated to alter the surface characteristics, typically by depositing a self assembled monolayer on the surface. After deposition, the masking material is removed. A material of interest is then deposited over the substrate such that the material adheres only to regions not originally covered by the mask such that the mask acts as a negative resist. Using such techniques, feature sizes of devices smaller than the smallest droplet printed may be fabricated.Type: ApplicationFiled: June 27, 2002Publication date: January 1, 2004Applicant: Xerox CorporationInventors: William S. Wong, Steven E. Ready, Stephen D. White, Alberto Salleo, Michael L. Chabinyc