Patents by Inventor Albertus Jan Paulus Maria Van Uden

Albertus Jan Paulus Maria Van Uden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7554831
    Abstract: A read only memory matrix in an integrated circuit contains data transistors coupled to both the bit lines and the word lines in data dependent ones of the cells of the matrix. A differential sense amplifier has a first input coupled to a bit line, a second input coupled to a reference circuit and a control input for controlling activation and deactivation of amplification by the sense amplifier. A coupling circuit controllably permits charge sharing between a selectable one of the bit lines and the first input. A timing circuit is arranged to signal operation in a first phase, when the word lines have selected a row of the matrix, followed by a second phase. The timing circuit controls the coupling circuit to permit charge sharing between the input and the selectable one of the bit lines in the first phase.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: June 30, 2009
    Assignee: NXP B.V.
    Inventor: Albertus Jan Paulus Maria Van Uden
  • Publication number: 20090016145
    Abstract: A read only memory matrix in an integrated circuit contains data transistors coupled to both the bit lines and the word lines in data dependent ones of the cells of the matrix. A differential sense amplifier has a first input coupled to a bit line, a second input coupled to a reference circuit and a control input for controlling activation and deactivation of amplification by the sense amplifier. A coupling circuit controllably permits charge sharing between a selectable one of the bit lines and the first input. A timing circuit is arranged to signal operation in a first phase, when the word lines have selected a row of the matrix, followed by a second phase. The timing circuit controls the coupling circuit to permit charge sharing between the input and the selectable one of the bit lines in the first phase.
    Type: Application
    Filed: January 18, 2005
    Publication date: January 15, 2009
    Inventor: Albertus Jan Paulus Maria Van Uden
  • Patent number: 6664798
    Abstract: Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along a connection, the other one of the first and second voltage is a reference voltage.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: December 16, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Franciscus Gerardus Maria De Jong, Rodger Frank Schuttert, Johannes De Wilde, Gerrit Willem Den Besten, Bernardus Martinus Johannes Kup, Albertus Jan Paulus Maria Van Uden
  • Publication number: 20010015653
    Abstract: Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along said connection, the other one of the first and second voltage is a reference voltage.
    Type: Application
    Filed: February 22, 2001
    Publication date: August 23, 2001
    Applicant: U.S. PHILIPS CORPORATION.
    Inventors: Franciscus Gerardus Maria De Jong, Rodger Frank Schuttert, Johannes De Wilde, Gerrit Willem Den Besten, Bernardus Martinus Johannes Kup, Albertus Jan Paulus Maria Van Uden