Abstract: As will be described in more detail hereinafter, there is disclosed herein a titanium nitride diffusion barrier layer and associated method for use in non-silicon semiconductor technologies. In one aspect of the invention, a semiconductor device includes a non-silicon active surface. The improvement comprises an ohmic contact serving to form an external electrical connection to the non-silicon active surface in which the ohmic contact includes at least one layer consisting essentially of titanium nitride. In another aspect of the invention, a semiconductor ridge waveguide laser is disclosed which includes a semiconductor substrate and an active layer disposed on the substrate. A cladding layer is supported partially on the substrate and partially on the active layer. The cladding layer includes a ridge portion disposed in a confronting relationship with the active region.

Abstract: A method for full-wafer processing of laser diodes with cleaved facets combining the advantages of full-wafer processing, to date known from processing lasers with etched facets, with the advantages of cleaved facets. The steps being: defining the position of the facets to be cleaved by scribing marks into the top surface of a laser structure comprising epitaxially grown layers, these scribed marks being perpendicular to the optical axis of the lasers to be made, the scribed marks being parallel, their distance (l.sub.c) defining the length of the laser cavities and the distance (l.sub.

Abstract: A method for cleaving semiconductor wafers, or segments thereof, which comprises placing the wafer, provided with scribe lines defining the planes where cleaving is to take place, inbetween a pair of flexible transport bands and guiding it around a curved, large radius surface thereby applying a bending moment. With a moment of sufficient magnitude, individual bars are broken off the wafer as this is advanced, the bars having front-and rear-end facets. On cleaving, each bar, while still pressed against the curved surface, is automatically separated whereby mutual damage of the facets of neighboring bars is prevented. For further handling, e.g. for the transport of the bars to an evaporation station for passivation layer deposition, provisions are made to keep the bars separated. Cleaving and the subsequent passivation coating can be carried out in-situ in a vacuum system to prevent facet contamination prior to applying the passivation.

Abstract: A process for the fabrication of "low temperature"-gate MESFET structures, i.e., gate metal deposition takes place after annealing of an n.sup.+ -implant that form source- and drain- contact regions. The process permits self-alignment of all three important MESFET parts, namely, the implanted contact regions, and both, the ohmic, as well as the gate, contact metallizations. In the process, a multi-layer "inverted-T" structure is used as a mask for the n.sup.+ -implant and for the ohmic and gate metallizations. The upper part of the "inverted-T" is a so-called dummy gate which is replaced by the Schottky gate after ohmic contact metal deposition. The source-gate and drain-gate separations are determined by the shoulders of the lower layer of the "inverted-T", the shoulders being obtained using sidewall techniques.