Abstract: An active retinal implant (10) to be implanted into an eye has an array (16) of stimulation elements (17) that emit stimulation signals to cells of the retina, wherein the stimulation elements (17) are designed as radiation-emitting elements.

Abstract: An implantable device (10) is used to emit electrical stimulation signals to surrounding tissue by means of at least one stimulation electrode (17). The device (10) has an input stage which is connected to a supply unit (12) by a cable, by means of which the input stage is supplied with at least one substantially square electrical AC voltage which is, averaged over time, at least virtually free of a DC voltage with respect to an external ground (29), which can be connected to the tissue (64) (FIG. 1).

Abstract: An implantable device (10) is used to emit electrical stimulation signals to surrounding tissue by means of at least one stimulation electrode (17). The device (10) has a sensor unit (26), which generates a useful signal (D) in the form of analogue voltage pulses (73) from externally fed signals, and an output stage (28) which generates the stimulation signals (E) from the useful signal (D). The output stage (28) emits the stimulation signals (E) in, averaged over time, a substantially DC voltage free fashion to an external ground (29), which can be connected to the tissue (64).

Abstract: An active retinal implant (10) to be implanted into an eye has an array (16) of stimulation elements (17) that emit stimulation signals to cells of the retina, wherein the stimulation elements (17) are designed as radiation-emitting elements.

Abstract: An implantable device (10) is used to emit electrical stimulation signals to surrounding tissue by means of at least one stimulation electrode (17). The device (10) has an input stage which is connected to a supply unit (12) by a cable, by means of which the input stage is supplied with at least one substantially square electrical AC voltage which is, averaged over time, at least virtually free of a DC voltage with respect to an external ground (29), which can be connected to the tissue (64) (FIG. 1).

Abstract: An implantable device (10) is used to emit electrical stimulation signals to surrounding tissue by means of at least one stimulation electrode (17). The device (10) has a sensor unit (26), which generates a useful signal (D) in the form of analogue voltage pulses (73) from externally fed signals, and an output stage (28) which generates the stimulation signals (E) from the useful signal (D). The output stage (28) emits the stimulation signals (E) in, averaged over time, a substantially DC voltage free fashion to an external ground (29), which can be connected to the tissue (64).

Abstract: A method for obtaining line synchronization information items from a video signal is proposed. The inventive method is based on convolving the relevant part of an analogue video line signal with a pattern function. The result of the convolution operation is further processed to determine the time instants of the occurrence of the horizontal sync signals. The time instants are subsequently filtered to generate horizontal pulses. A video line memory allows to utilize subsequent horizontal sync signals for calculating the horizontal sync pulse of a current video line. The invention also relates to an apparatus for carrying out the method.

Abstract: In accordance with the present disclosure, refresh patterns can be proposed for video data having motion and distortion estimation data for the proposed patterns can be determined based on motion data. An acceptable refresh pattern from the proposed refresh patterns can be selected and utilized. Such a “tailored” pattern that is dynamic and can change quickly, can cater to the direction of motion of the video to provide low distortion and high quality video.

Abstract: A method for obtaining line synchronization information items from a video signal is proposed. The inventive method is based on convolving the relevant part of an analogue video line signal with a pattern function. The result of the convolution operation is further processed to determine the time instants of the occurrence of the horizontal sync signals. The time instants are subsequently filtered to generate horizontal pulses. A video line memory allows to utilize subsequent horizontal sync signals for calculating the horizontal sync pulse of a current video line. The invention also relates to an apparatus for carrying out the method.

Abstract: Television receivers are increasingly making use of digital signal processing. Present-day television receivers use a line-coupled clock system in this case, since this produces an orthogonal pixel array for signal processing on the picture screen. The disadvantage of such a clock grid resides in its problematical generation, in particular when video recorders are used as signal source. According to the invention, video signals are digitized and processed by means of a free-wheeling system clock made from a quartz oscillator. In order not to have to use large buffer memories, the vertical deflection is synchronized with the input signal, but the number of lines per field or frame is varied.

Abstract: A method for obtaining line synchronization information items from a video signal is proposed. To that end, the following improvement measures are proposed: a) an accurate determination of the position of a line synchronization pulse is effected by carrying out a convolution operation between the video signal for the video line and a pattern function. The exact position is then established by analysis of the result function (&phgr;sv(k)) of the convolution operation. B) time-domain filtering of the established positions of the line synchronization pulses is carried out, in which a linear or non-linear estimation for the purpose of determining the corrected positions of the line synchronization pulses is carried out in each case. The invention also relates to an apparatus for carrying out the method.

Abstract: A circuit, for processing high frequency digital signals minimizes radiation interference by reducing voltage swings at the circuit input. This is accomplished by forming circuit input structures, which exhibit very low input impedances. An example of such input circuitry is a common gate amplifier with a diode coupling the source electrode of the common gate amplifier to ground potential and input signal applied to the source electrode. Output signal is derived from the collector of the common gate electrode which has a further diode as a load circuit.

Abstract: A digital detector circuit for recovering the bit timing of a data stream with a PLL includes a digital phase detector and a digital pulse length detector whose output signals are added and integrated, and the result is used for controlling the oscillator frequency. The output signal of the pulse length detector is determined by a corresponding algorithm, one slow and two fast, with direction-dependent output signals of the pulse length detector being generated.

Abstract: An arrangement for reducing interference in tuned circuits in integrated circuits as a result of the reception and transmission of high frequencies. An external tuned circuit is integrated in the integrated circuit and the interference which is otherwise produced by the connecting pins is eliminated.

Abstract: A synchronizing signal separating circuit for a television receiver, comprising: a source of a video signal having a line synchronizing signal component; a line synchronizing signal component separator having an amplitude selective stage and having a flywheel stage imparting a response time constant to the separator which enhances noise immunity; a delay circuit for the video signal, for example a multiple line delay, coupled ,between the video signal source and the separator; a control circuit coupled to the video signal source and evaluating the time positions of line synchronizing pulses of a plurality of successive lines to identify a kind of line phase disturbance in which the line phase of an entire raster is displaced, the control circuit supplying a control signal to the separator indicative of the kind of phase disturbance; and, the flywheel stage being temporarily rendered inoperative responsive to the control signal, for example by temporarily decreasing the response time of the separator, upon ide

Abstract: A control circuit for maintaining the mean value of the amplitudes of control pulses having a first level and data pulses having a second level includes a detector for providing the control pulses and the data pulses. A reference voltage source provides first, second and third reference voltages having three different levels. A plurality of comparators each receive both the control pulses and the data pulses. A first comparator also receives the lowest of the reference voltages and provides regulation pulses when the control pulses reach the level of the lowest reference voltage. A second comparator receives the second highest reference voltage and provides level limiting pulses to maintain the level of the regulation pulses constant. A third of the comparators receives the highest reference voltage and provides data pulses when the third reference voltage is reached.

Abstract: An oscillator containing a chain of delay components (10.1, . . . , 10.l) and emitting an output signal, the period T of which substantially corresponds to the total delay of the chain. The oscillator has a logic stage (11) to which are applied signals which can be tapped along the chain or generated by additional means. The logic stage affects the input signal of the first delay component (10.1) in the chain. The oscillator may be used as part of a phase detector.

Abstract: A clocked digital signal processing system includes apparatus for unambiguously indicating the phase of an input signal relative to a reference clock signal. In particular, the disclosed apparatus reduces timing uncertainty between the reference clock, and the output signal of a phase detector representing the phase relationship between the input signal and the reference clock. A phase detector including a logic network provides plural comparison signals representing a phase relationship between the input and reference signals. The comparison signals are conveyed via first and second latch circuits, in respective groups, to a clocked downstream stage. The first and second latch circuits are clocked by different phases of the reference clock and provide outputs synchronous with the reference clock. The downstream stage responds to the reference clock for conveying output signals front the first and second latch circuits to an output at which the unambiguous indication appears.

Abstract: When processing a digital video signal, the problem often arises of converting the signal from a first sampling raster which is asynchronous with respect to the line interval to a second sampling raster which synchronous with the line interval. Interpolation filters are used for this purpose. The present invention provide a simple method for the conversion which does not require intermediate D/A or A/D conversion. For each line of the input signal, the phase of samples of the first sampling raster relative to the line synchronization pulse and the total number of the samples for this line are determined and are used to control of the interpolation filter.

Abstract: In digital circuit technology, bipolar transistors are advantageously used for switching thanks to their high mutual conductance. Since a transistor operated in the saturation state has a retarded switching behavior, saturation must be avoided for rapid switching processes.In Schottky diodes, saturation is avoided by connecting a Schottky diode parallel to the base-collector barrier layer.However, the manufacture of Schottky diodes in integrated circuit technology entails additional process steps.The circuit in accordance with the invention avoids these additional process steps by replacing the Schottky diode with a unidirectional semiconductor element composed of field-effect transistors.BICMOS technology processes permitting monolithic integration or bipolar and MOS transistors are particularly suitable for manufacture of the circuit.