Patents by Inventor Albrik Avanessian

Albrik Avanessian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Intersect area based ground rule for semiconductor design
    Patent number: 7941780
    Abstract: A design rule that determines a degree of overlap between two design elements in two adjoining levels by estimating a physical overlap area, or an “intersect area,” of corresponding structures in a semiconductor chip is provided. The estimation of the physical intersect area may factor in line edge biasing, critical dimension tolerance, overlay tolerance, and corner rounding to provide an accurate estimate of a physical area for each of the structures corresponding to the two design elements. The intersect area is employed as a metric to determine compliance with a ground rule, i.e., the ground rule is specified in terms of the intersect region. Other derived quantities such as electrical resistance, electromigration resistance, expected yield may be calculated from the intersect area, and may be advantageously employed to optimize the design data.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: Albrik Avanessian, Henry A. Bonges, III, Dureseti Chidambarrao, Stephen E. Greco, Douglas W. Kemerer, Tina Wagner
  • INTERSECT AREA BASED GROUND RULE FOR SEMICONDUCTOR DESIGN
    Publication number: 20090265673
    Abstract: A design rule that determines a degree of overlap between two design elements in two adjoining levels by estimating a physical overlap area, or an “intersect area,” of corresponding structures in a semiconductor chip is provided. The estimation of the physical intersect area may factor in line edge biasing, critical dimension tolerance, overlay tolerance, and corner rounding to provide an accurate estimate of a physical area for each of the structures corresponding to the two design elements. The intersect area is employed as a metric to determine compliance with a ground rule, i.e., the ground rule is specified in terms of the intersect region. Other derived quantities such as electrical resistance, electromigration resistance, expected yield may be calculated from the intersect area, and may be advantageously employed to optimize the design data.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 22, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Albrik Avanessian, Henry A. Bonges, III, Dureseti Chidambarrao, Stephen E. Greco, Douglas W. Kemerer, Tina Wagner