Abstract: A low cost direct frequency synthesizer is structured to operate with moderate bandwidth, good noise performance, superior spurious performance, and fast switching. The direct frequency synthesizer employs a starter frequency signal f.sub.o (33-1) and a set of LO frequency signals f.sub.1 through f.sub.n (35-1) spaced from each other by a frequency increment .delta.. A mixer circuit (34-1) generates a product of the starter frequency signal and the LO frequency signals. A divider (31-1) has a divider ratio equal to N. The number of LO frequency signals is equal to or less than N. The starter frequency f.sub.o has a value equal to .delta. times (N+x) where x is equal to 0 or a positive integer. The LO frequency f.sub.1 has a value equal to (N+1)f.sub.o. An intermediate nonswitchable band pass filter (36-1) passes a difference portion of the mixer product to the divider, and a nonswitchable output band pass filter (38-1) receives an output from the divider to generate a moderate bandwidth output.