Patents by Inventor Aldo Torazzina

Aldo Torazzina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4575686
    Abstract: The output stage for power amplifiers, in particular of the minimum drop, low tension type, is intended for use with apparatus which do not require a high output current, which output stage can operate at a lower minimum voltage supply than comparable known stages. The output stage comprises upper and lower sections interposed between a power supply line and a ground line, each section including transistors across which voltage drops (V.sub.CE sat, V.sub.BE) appear and forming current sources for each section, diodes, and at least one current mirror circuit of the multiplying type adapted to determine as a first approximation the current gain of each section. The minimum voltage drop between the power supply line and ground line, as computed for any electric line connecting the power supply line and ground line, never exceeds the value of V.sub.BE +2V.sub.CE sat.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: March 11, 1986
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4555674
    Abstract: A current control circuit coupled to the final stage of the amplifier automatically adjusts the bias current of the final stage so that it is low in the no-load state and higher in the load state. The low no-load value avoids useless energy leakages and heat dissipations, while the higher load value avoids "cross-over" distortions.
    Type: Grant
    Filed: August 15, 1983
    Date of Patent: November 26, 1985
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina