Patents by Inventor Aldo Torti

Aldo Torti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7135891
    Abstract: Current through a wire is sensed with a shunt resistor and a sense resistor in a current divider circuit. The values of the shunt resistor and sense resistor are related to provide a specified gain ratio to increase a dynamic range of current measurement. The sense resistor is a trimmable resistor, the configuration of which can be discerned from a look-up table based on a level of precision needed for current measurement. The two resistors can also be related by thermal coefficients to improve linearity of current measurements.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: November 14, 2006
    Assignee: International Rectifier Corporation
    Inventors: Massimo Grasso, Aldo Torti, Andrea Merello, Jonas Aleksandravicius
  • Patent number: 7132698
    Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. The annular flange preferably comprises a projection having a squared tab and circular distal end that is received by a receiving groove having a notch (to receive the squared tab) and a cavity (to receive the distal end).
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: November 7, 2006
    Assignee: International Rectifier Corporation
    Inventors: Mario Merlin, Aldo Torti
  • Publication number: 20060049854
    Abstract: Current through a wire is sensed with a shunt resistor and a sense resistor in a current divider circuit. The values of the shunt resistor and sense resistor are related to provide a specified gain ratio to increase a dynamic range of current measurement. The sense resistor is a trimmable resistor, the configuration of which can be discerned from a look-up table based on a level of precision needed for current measurement. The two resistors can also be related by thermal coefficients to improve linearity of current measurements.
    Type: Application
    Filed: August 22, 2005
    Publication date: March 9, 2006
    Inventors: Massimo Grasso, Aldo Torti, Andrea Merello, Jonas Aleksandravicius
  • Publication number: 20050017760
    Abstract: Current through a wire is sensed with a shunt resistor and a sense resistor in a current divider circuit. The values of the shunt resistor and sense resistor are related to provide a specified gain ratio to increase a dynamic range of current measurement. The sense resistor is a trimmable resistor, the configuration of which can be discerned from a look-up table based on a level of precision needed for current measurement. The two resistors can also be related by thermal coefficients to improve linearity of current measurements.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Massimo Grasso, Aldo Torti, Andrea Merello, Jonas Aleksandravicius
  • Patent number: 6822184
    Abstract: A process for joining a steel terminal to a copper electrode comprises applying a thin silver-copper flash to the surface of a copper electrode and bringing a steel surface into contact with the flash during high frequency welding. The weldment is improved compared to conventional welds that do not incorporate the flash layer. For example, a silver—18 wt % copper alloy having a thickness of about 180 microns produced uniform, high quality welds between nickel steel terminals and 99.999% pure copper electrodes.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: November 23, 2004
    Assignee: International Rectifier Corporation
    Inventors: Aldo Torti, Mario Merlin, Sebastiaro Ferrero
  • Patent number: 6781227
    Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. An annular flange may also be embedded in the plastic molded insulation ring and connected to an annular rib of a pole piece by a circular connector.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: August 24, 2004
    Assignee: International Rectifier Corporation
    Inventors: Mario Merlin, Aldo Torti, Stefano Santi
  • Publication number: 20040124180
    Abstract: A process for joining a steel terminal to a copper electrode comprises applying a thin silver-copper flash to the surface of a copper electrode and bringing a steel surface into contact with the flash during high frequency welding. The weldment is improved compared to conventional welds that do not incorporate the flash layer. For example, a silver—18 wt % copper alloy having a thickness of about 180 microns produced uniform, high quality welds between nickel steel terminals and 99.999% pure copper electrodes.
    Type: Application
    Filed: October 22, 2003
    Publication date: July 1, 2004
    Applicant: International Rectifier Corp.
    Inventors: Aldo Torti, Mario Merlin, Sebastiaro Ferrero
  • Publication number: 20040119089
    Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. The annular flange preferably comprises a projection having a squared tab and circular distal end that is received by a receiving groove having a notch (to receive the squared tab) and a cavity (to receive the distal end).
    Type: Application
    Filed: October 7, 2003
    Publication date: June 24, 2004
    Applicant: International Rectifier Corporation
    Inventors: Mario Merlin, Aldo Torti
  • Publication number: 20030141517
    Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. An annular flange may also be embedded in the plastic molded insulation ring and connected to an annular rib of a pole piece by a circular connector.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Applicant: International Rectifier Corporation
    Inventors: Mario Merlin, Aldo Torti, Stefano Santi
  • Patent number: 6559529
    Abstract: A force-fit diode for high circuit application has a cylindrical constant diameter conductive body which has a tapered top and bottom peripheral edge. An axial conductor extends from one end of the housing. The tapered top and bottom peripheral edges allow the housing to be forced into an opening in the bus, with either the housing bottom or the axial lead being the first to enter the openings.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: May 6, 2003
    Assignee: International Rectifier Corporation
    Inventors: Aldo Torti, Mario Merlin, Emilio Mattiuzzo
  • Patent number: 6489881
    Abstract: A low resistance high current sense resistor is formed on a semiconductor die using conventional semiconductor processing techniques. The resistor die has one or two resistive layers which are photolithographically divided into a plurality of series and parallel resistor sections connected to first and second main terminals. First and second sense terminals are connected across one or a pattern of plural ones of the resistors to produce an output related to the current between the main terminals. Fusible links permit the trimming of the final resistance value.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: December 3, 2002
    Assignee: International Rectifier Corporation
    Inventors: Jonas Aleksandravicius, Gene Pranauskiene, Algirdas Kaskonas, Aldo Torti
  • Publication number: 20020145189
    Abstract: A force-fit diode for high circuit application has a cylindrical constant diameter conductive body which has a tapered top and bottom peripheral edge. An axial conductor extends from one end of the housing. The tapered top and bottom peripheral edges allow the housing to be forced into an opening in the bus, with either the housing bottom or the axial lead being the first to enter the openings.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Applicant: International Rectifier Corp.
    Inventors: Aldo Torti, Mario Merlin, Emilio Mattiuzzo
  • Patent number: 5391919
    Abstract: A semiconductor device module is formed of four identical frame sections which each have a flat base and perpendicularly extending strap terminal. Semiconductor chips are soldered to the center of the top surfaces of each base, and the devices are interconnected by flat brass strips having one end soldered to the top of one chip and the other end soldered to the base of an adjacent section. The base sections lie in a common plane at the bottom of an insulative filled insulation cup. The terminals extend parallel and out of the top of the cup.
    Type: Grant
    Filed: October 22, 1993
    Date of Patent: February 21, 1995
    Assignee: International Rectifier Corporation
    Inventors: Aldo Torti, Emilio Mattiuzzo