Abstract: A method of transmitting data by light communication includes encoding a set of data values through a temporal variation of light emitted by one or more light emitters. The method further includes recording, using an event-based sensor, a sequence of events and then processing the recorded sequence of events using a spiking neural network to obtain information indicative of the underlying temporal variation of the light that was emitted by the one or more light emitters. The set of data values can thus be decoded accordingly.

Abstract: A computer implemented method for detecting timing faults during execution of a task having an estimated worst case execution time (WCET). The method includes, in response to a monitoring interrupt occurring, determining the progress of the task at the interrupt and the executed time of the task up until the interrupt, determining the remaining worst case execution time (rWCET) for the task to finish its execution from the progress of the task at the point of interrupt, and if the sum of the rWCET and the run time of the task exceed the estimated WCET of the task, then detecting that a timing fault will occur.

Abstract: A method for managing software application tasks being performed in a multi-core processing system, the system comprising: a management core configured to manage the allocation of processing tasks in the system; a plurality of processing cores configured to execute instructions for performing processing tasks; at least one shared resource, wherein the at least one shared resource is connected to each of the processing cores; a contention assessment module configured to monitor the amount of contention in the system; and a processing suspension module configured to cause the suspension of processing on at least one of the processing cores; wherein the method comprises: determining a criticality level of each task to be performed; allocating each task to a respective processing core of the plurality of processing cores based on the determined criticality level; assigning a contention threshold to at least one processing core of the plurality of processing cores; monitoring the amount of contention caused by the

Abstract: An integrated circuit may include two processing cores. Each processing core may include: a core controller operable to execute instructions to perform processing tasks; a memory resource connected to the core controller; and a hardware accelerator module connected to the core controller. The integrated circuit may further include: a shared bus connected to the respective hardware accelerator modules of the two processing cores; and a shared memory resource connected to the shared bus; where the only communication path between the two processing cores is via the hardware accelerator modules and the shared bus.

Abstract: A system-on-chip comprises a first core having a first processor architecture and a second core having a different second processor architecture. A shared bus is communicatively coupled to the cores. A shared memory is communicatively coupled to the shared bus, for storing shared data accessible by cores. A hardware comparison module is configured to compare first data, determined by one or more operations of the first core, and second data, determined by one or more operations of the second core, to detect an inconsistency between the first data and the second data, and to signal when an inconsistency is detected. A first comparison-data bus is communicatively coupled to the first core and to the comparison module, and arranged to provide the first data to the hardware comparison module. A second comparison-data bus is communicatively coupled to the second core and to the comparison module, and arranged to provide the second data to the comparison module.

Abstract: Disclosed is a method of training a language model to generate “microbenchmarks” in which the training data is specifically associated with certain microarchitecture characteristics that the “microbenchmarks” are designed for testing. Also disclosed are language models that have been trained in this manner, and the corresponding use thereof to generate “microbenchmarks”.

Abstract: A method for detecting anomalies in the nominal execution of tasks in a processor system includes executing a task on the processor system, monitoring, in real time via dedicated communication means, hardware performance monitors, HPMs, of at least one resource of the processor system resulting from the execution of the task on the processor system; classifying the task based on the monitored HPMs; comparing the classified task with an expected completion profile of the task; and if the classified task deviates from the expected completion profile, then identifying an anomaly in the nominal execution of the task.

Abstract: A method for designing custom microarchitectures includes proposing an initial microarchitecture comprising at least two intellectual property, IP, components and at least one interference channel, ICh, based on final requirements of the microarchitecture. The method further includes prototyping the proposed microarchitecture; executing at least one ?Benchmark on the prototyped microarchitecture; monitoring at least one Performance Monitoring Counter, PMC, resulting from the execution of the at least one ?Benchmark to identify whether the prototyped microarchitecture satisfies timing and contention requirements of the microarchitecture. If all timing and contention requirements are met, the prototyped custom microarchitecture is accepted as the custom microarchitecture.

Abstract: A person activity recognition system (1) comprising: an image sensor (2) arranged to collect at least one image of a personal environment and generate image data (7) from the at least one image; and a processor (3) communicatively connected to the image sensor (2) to receive image data (7), and to a memory (4) and a database (5); the memory (4) including a list of detectable objects that may be present in the personal environment and corresponding results (8) relating to an activity of the person; and the processor (3) configured to execute a plurality of machine-readable instructions stored in a non-transitory computer readable medium in the memory (4), wherein the instructions, when executed by the processor (3), cause the processor (3) to: receive the image data (7); analyse the image data (7) to detect one or more objects in the personal environment; compare the detected object(s) with the list of detectable objects; and output to the database (5) a result (8) relating to an activity of the person.

Abstract: A method of analysing a spectrum on which information is transmitted, comprising: determining each different type of modulation used for transmitting the information across the spectrum, for each determined modulation, identifying its carrier frequency and its bandwidth, defining characteristics of usage of the spectrum in terms of the determined modulations and their corresponding carrier frequencies and bandwidths.

Abstract: A method of allocating space on a spectrum on which information is transmitted, to information to be transmitted, the method comprising: identifying carrier frequencies and bandwidths of information being transmitted on the spectrum, determining an optimal carrier frequency and bandwidth for the information to be transmitted based on the carrier frequencies and bandwidths of information being transmitted on the spectrum; transmitting the information to be transmitted using modulation at the identified optimal carrier frequency and bandwidth.