Abstract: An electronic device as taught herein offers reduced on-chip memory processing of graphics data, while also offering low memory bandwidth requirements. The electronic device includes a host block with off-chip memory, a graphics processing block with on-chip memory, a display controller, and a graphics display. The off-chip memory stores a frame of graphics data. The graphics processing block processes that frame of graphics data in blocks, or “tiles,” of graphics data. For each tile, the graphics processing block fetches rendering instructions and graphics data corresponding to that tile from the off-chip memory, stores the graphics data in the on-chip memory, and renders pixel values for the tile by processing the graphics data in accordance with the rendering instructions. The graphics processing block then sends the rendered pixel values for the tile directly to the display controller and partially updates the graphics display memory with those rendered pixel values.

Abstract: A method for refresh operation of a multi-buffer arrangement for a graphics memory having a first and a second operation mode is disclosed. The method comprises writing information to one of a first and second buffers of the multi-buffer arrangement; presetting the one of the buffers, when previous refresh operation was in the second operation mode, before the writing of information to the one of the buffers; dynamically selecting one of the first and the second operation mode; copying information, when in the first operation mode, between a first and a second buffer of the multi-buffer arrangement, before the writing of information to the one of the buffers; and providing information from the buffer arrangement to a display. Computer programs, multi-buffer arrangements and communication apparatuses comprising such multi-buffer arrangements are also disclosed.

Abstract: An electronic device as taught herein offers reduced on-chip memory processing of graphics data, while also offering low memory bandwidth requirements. The electronic device includes a host block with off-chip memory, a graphics processing block with on-chip memory, a display controller, and a graphics display. The off-chip memory stores a frame of graphics data. The graphics processing block processes that frame of graphics data in blocks, or “tiles,” of graphics data. For each tile, the graphics processing block fetches rendering instructions and graphics data corresponding to that tile from the off-chip memory, stores the graphics data in the on-chip memory, and renders pixel values for the tile by processing the graphics data in accordance with the rendering instructions. The graphics processing block then sends the rendered pixel values for the tile directly to the display controller and partially updates the graphics display memory with those rendered pixel values.

Abstract: A chatter boundary system includes a measuring module, a comparison module, and a boundary module. The measuring module measures and collects samples of undulations in a manufactured part. The comparison module classifies a sound signal generated by the undulations as either noisy or quiet. The boundary module determines a continuous boundary between the noisy and quiet undulations based on the samples and the sound signal.

Abstract: A line-clipping method includes determining whether a fixed-point-arithmetic line-clipping operation would likely be inaccurate due to limitations of fixed-point arithmetic. A line to be clipped has a first end point and a second end point. Responsive to a determination that the line-clipping operation would likely be inaccurate, a line-fractioning operation is performed. This Abstract is provided to comply with rules requiring an Abstract that allows a searcher or other reader to quickly ascertain subject matter of the technical disclosure. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).