Abstract: A method for improving heavy-to-light load transient response in low-power switch-mode power supplies is described. It uses a negative voltage input power rail and a digital controller with an extended duty ratio control value to provide faster discharging current slew rate in the switched mode power supplies (SMPS) inductor.

Abstract: A multiphase controller for a DC-to-DC power supply includes logic to estimate parameters for multiple phases that provide a combined output at a load. The estimated parameters include a current estimate and an effective resistance estimates for each phase so that a power estimate for each phase can be produced. The logic adjusts the operation of the phases using the power estimate for each phase.

Abstract: A circuit converts an input voltage to an output voltage. The circuit includes a first stage voltage converter that receives the input voltage and converts the input voltage. The first stage voltage converter includes a first buck converter having a double rail output: a first rail at a high intermediate voltage and a second rail at a low intermediate voltage. The circuit also includes a second stage voltage converter that receives the output rails and produces the output voltage.

Abstract: A switched mode power can use a digital controller to control the switching of the at least one switch of the switched mode power supply. The current through the power inductor can be estimated using a self-tuning digital current estimator.

Abstract: A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, “glue logic” and application specific oversampling digital pulse-width modulator are introduced. Experimental results demonstrate transient response with 50% smaller deviation than that of conventional controllers, allowing for proportional reduction in the size of the power stage output capacitor.

Abstract: Limit-cycle oscillation (LCO) generation by altering a digital transfer function of a feedback loop element provides a controllable method and apparatus for generating LCOs within a switch-mode power supply (SMPS). Measurements of the LCO characteristics can then be used to determine characteristics of the SMPS and/or determine proper compensation schemes. At least a zero error code of the feedback loop element is removed, causing the control value to oscillate between at least two values. Additional codes may be progressively removed until an LCO is detected, in order to ensure LCO generation with minimum disruption of SMPS operation. An analog-to-digital converter (ADC) that converts an output voltage or current to a control value may be used to generate an LCO by removing one or more output codes to alter its transfer function. Alternatively, a quantization step of the pulse-width modulator or other modulator may be increased to temporarily cause LCOs.

Abstract: A switching power supply apparatus has a power circuit unit, the power circuit unit including a first switching element connected at a first end to a first end of a power supply, an inductor connected at a first end thereof to a second end of the first switching element, a second output terminal connected to a second end of the inductor, a capacitor connected between a first output terminal and the second output terminal, and a second switching element connected between a second end of the power supply and a second end of the first switching element. The switching power supply apparatus has an optimal response multi-mode digital current program mode control unit, the optimal response multi-mode digital current program mode control unit including an error signal generator which generates an error signal according to a potential difference between an output voltage and a preset voltage, and an inductor current detector which detects and amplifies an inductor current.

Abstract: A method for improving heavy-to-light load transient response in low-power switch-mode power supplies is described. It uses a negative voltage input power rail and a digital controller with an extended duty ratio control value to provide faster discharging current slew rate in the switched mode power supplies (SMPS) inductor.

Abstract: A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, “glue logic” and application specific oversampling digital pulse-width modulator are introduced. Experimental results demonstrate transient response with 50% smaller deviation than that of conventional controllers, allowing for proportional reduction in the size of the power stage output capacitor.

Abstract: A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.

Abstract: A digital controller for low-power DC-DC switch mode power supplies (SMPS) suitable for on-chip implementation and use in portable battery-powered systems is provided. The digital controller allows operation at ultra high constant switching frequencies and can be implemented with a simple low-power digital hardware. The digital controller includes a digital pulse width modulator (DPWM), based on a multibit 2nd orders sigma-delta (?-?) principle, and a dual-sampling mode PID compensator. The output voltage is either sampled at a frequency lower than the switching frequency (undersampled) or sampled at the switching rate. In steady-state, undersampling results in reduced power consumption, while during transients, sampling at the switching rate provides fast transient response. Another aspect of the present invention is a dual sampling/clocking scheme, which is relied on by the DPWM described.

Abstract: Embodiments of the present invention concern a multiphase switch-mode power supply. The multiple phase switch-mode power supply can have at least one switch and a digital controller to control the switching of the at least one switch. During a calibration period, the digital controller can freeze the current of all of the multiple phases except for a phase being calibrated. This can be done by fixing the current reference of the phases except for the phase being calibrated.

Abstract: A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.

Abstract: One embodiment of the present invention is a digitally controlled DC-DC converter comprising of a power stage including at least one switch and an output capacitor. A digital controller can control the switching of the at least one switch. The digital controller can include logic to produce an indication related to a zero resulting from the equivalent series resistance (ESR) of the output capacitor and to update the control of the switching of the switch in the power stage based on the estimate.

Abstract: A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.

Abstract: A voltage-to-time based windowed analog-to-digital converter (ADC) can have programmable reference voltage, conversion time, and accuracy of voltage regulation. The ADC can be fully implemented on a small silicon area and is suitable for implementation in various integrated digital controllers for high-frequency low-power switch-mode power supplies (SMPS). The programmable characteristics can be achieved through the utilization of the inherent averaging effect of the delay line or of the other voltage-to-time conversion structures and through the adjustments of delay cells' propagation times or the effective voltage-to-time conversion ratio in alternative structures.

Abstract: A switch-mode power supply (SMPS) with auto-tuning using limit-cycle oscillation response evaluation provides optimized performance with reduced capacitance and inductance requirements for a given design. During operation of the SMPS, parameters of the converter are extracted, and the feedback and/or feed-forward compensation is adjusted to either hold the loop bandwidth of the converter near the critical bandwidth of the output capacitors, or maintain output voltage transients within a specified limit. The compensator response is either periodically updated, or is updated in response to an event, such as detection of a transient voltage spike having a characteristic that exceeds one or more predetermined thresholds.

Abstract: A switched mode power can use a digital controller to control the switching of the at least one switch of the switched mode power supply. The current through the power inductor can be estimated using a self-tuning digital current estimator.

Abstract: A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.

Abstract: A limit-cycle oscillation (LCO) based switch-mode power supply (SMPS) response evaluation provides an effective mechanism for determining the characteristic response of an SMPS during normal operation of the SMPS. LCOs are induced in the SMPS loop by introducing a non-linearity in the loop, for example, decreasing the resolution of a pulse-width modulator that controls the SMPS switching circuit. The frequency and amplitude of the LCOs are determined and used to evaluate the characteristic response of the SMPS. In order to produce symmetric LCOs, which are more easily modeled, a zero-offset calibration circuit adjusts values provided to the pulse-width modulator, so that each value introduced during calibration is at the midpoint of a resolution cell. The frequency can be measured by counting between zero-crossings of the LCOs and the amplitude measured by capturing the LCO values immediately prior to each zero-crossing of a first difference of the LCO samples.