Patents by Inventor Aleksander Zubelewicz

Aleksander Zubelewicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10302814
    Abstract: A method for stimulating an earth formation according to a stimulation scenario for extracting hydrocarbons from the earth formation includes: selecting an earth formation stimulation scenario; applying a modified Mohr-Coulomb model that is configured to estimate behavior of a rock formation during the stimulation scenario, the modified Mohr-Coulomb model having a term representing dilatation in an out-of-plane orientation; predicting a fracture and damage network using the modified Mohr-Coulomb model; converting the fracture and damage network into permeability; simulating fluid flow in the earth formation using the permeability to predict hydrocarbon production; computing a value of a metric for hydrocarbon production for the selected stimulation scenario; iterating the selecting, applying, predicting, converting, simulating, and computing until the metric value meets or exceeds a threshold value; and stimulating the earth formation using a stimulation treatment system according to the stimulation scenario
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 28, 2019
    Assignee: BAKER HUGHES, A GE COMPANY, LLC
    Inventors: Tobias Hoeink, Aleksander Zubelewicz
  • Publication number: 20170052283
    Abstract: A method for stimulating an earth formation according to a stimulation scenario for extracting hydrocarbons from the earth formation includes: selecting an earth formation stimulation scenario; applying a modified Mohr-Coulomb model that is configured to estimate behavior of a rock formation during the stimulation scenario, the modified Mohr-Coulomb model having a term representing dilatation in an out-of-plane orientation; predicting a fracture and damage network using the modified Mohr-Coulomb model; converting the fracture and damage network into permeability; simulating fluid flow in the earth formation using the permeability to predict hydrocarbon production; computing a value of a metric for hydrocarbon production for the selected stimulation scenario; iterating the selecting, applying, predicting, converting, simulating, and computing until the metric value meets or exceeds a threshold value; and stimulating the earth formation using a stimulation treatment system according to the stimulation scenario
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Applicant: BAKER HUGHES INCORPORATED
    Inventors: Tobias Hoeink, Aleksander Zubelewicz
  • Publication number: 20080029888
    Abstract: A method and article of fabrication is described featuring a solder layer having a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path along which the crack propagates.
    Type: Application
    Filed: December 14, 2006
    Publication date: February 7, 2008
    Applicant: International Business Machines Corporation
    Inventors: Seungbae Park, Sanjeev Sathe, Aleksander Zubelewicz
  • Patent number: 6492724
    Abstract: A structure and methods for reinforcing a semiconductor device to prevent cracking is provided. The device may take the form of a semiconductor chip or a semiconductor chip package. When a semiconductor chip is provided, an adhesion layer is applied over its top surface, followed by the application of a reinforcing layer over the adhesion layer. When a semiconductor chip package is provided, the package first undergoes a cleaning process, followed by the application of an adhesion layer over its top surface and, lastly, the application of a reinforcing layer over the adhesion layer.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: Michael Anthony Gaynes, Mark Vincent Pierson, Aleksander Zubelewicz
  • Patent number: 6488806
    Abstract: A method for assembling a flip-chip package having a low stress chip comprises providing a laminate chip carrier having a chip electrically connected thereon, applying the underfill material between the chip and the laminate chip carrier, providing a cover plate and applying an adhesive to the cover plate or chip or both, placing the cover plate adjacent to the chip such that the adhesive contacts the chip and the cover plate, and curing the underfill material together with the adhesive. The resultant flip-chip package has low internal. stress and experiences enhanced fatigue life during thermal cycling.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Timothy F. Carden, Aleksander Zubelewicz
  • Patent number: 6347901
    Abstract: A method and article of fabrication is described featuring a solder layer having a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path along which the crack propagates.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: February 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: Seungbae Park, Sanjeev Sathe, Aleksander Zubelewicz
  • Publication number: 20010013392
    Abstract: A method for assembling a flip-chip package having a low stress chip comprises providing a laminate chip carrier having a chip electrically connected thereon, applying the underfill material between the chip and the laminate chip carrier, providing a cover plate and applying an adhesive to the cover plate or chip or both, placing the cover plate adjacent to the chip such that the adhesive contacts the chip and the cover plate, and curing the underfill material together with the adhesive. The resultant flip-chip package has low internal stress and experiences enhanced fatigue life during thermal cycling.
    Type: Application
    Filed: March 28, 2001
    Publication date: August 16, 2001
    Applicant: International Business Machines Corporation
    Inventors: Timothy F. Carden, Aleksander Zubelewicz
  • Publication number: 20010009277
    Abstract: A structure and methods for reinforcing a semiconductor device to prevent cracking is provided. The device may take the form of a semiconductor chip or a semiconductor chip package. When a semiconductor chip is provided, an adhesion layer is applied over its top surface, followed by the application of a reinforcing layer over the adhesion layer. When a semiconductor chip package is provided, the package first undergoes a cleaning process, followed by the application of an adhesion layer over its top surface and, lastly, the application of a reinforcing layer over the adhesion layer.
    Type: Application
    Filed: March 2, 2001
    Publication date: July 26, 2001
    Inventors: Michael Anthony Gaynes, Mark Vincent Pierson, Aleksander Zubelewicz
  • Patent number: 6224711
    Abstract: A method for assembling a flip-chip package having a low stress chip comprises providing a laminate chip carrier having a chip electrically connected thereon, applying the underfill material between the chip and the laminate chip carrier, providing a cover plate and applying an adhesive to the cover plate or chip or both, placing the cover plate adjacent to the chip such that the adhesive contacts the chip and the cover plate, and curing the underfill material together with the adhesive. The resultant flip-chip package has low internal stress and experiences enhanced fatigue life during thermal cycling.
    Type: Grant
    Filed: August 25, 1998
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventors: Timothy F. Carden, Aleksander Zubelewicz
  • Patent number: 6197619
    Abstract: A structure and methods for reinforcing a semiconductor device to prevent cracking is provided. The device may take the form of a semiconductor chip or a semiconductor chip package. When a semiconductor chip is provided, an adhesion layer is applied over its top surface, followed by the application of a reinforcing layer over the adhesion layer. When a semiconductor chip package is provided, the package first undergoes a cleaning process, followed by the application of an adhesion layer over its top surface and, lastly, the application of a reinforcing layer over the adhesion layer.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: March 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael Anthony Gaynes, Mark Vincent Pierson, Aleksander Zubelewicz
  • Patent number: 5949682
    Abstract: A heated unit for testing circuit board assemblies. An insulated enclosure receives card assemblies to be tested through a door. A heater within the enclosure heats the card assemblies at a constant regulated temperature. A motor separately applies angular displacement to the card assemblies which are held in a fixture to stress solder joints between a card substrate and components on the card substrate. The angular displacement is maintained at a predetermined amplitude during tests providing a controlled repeatable stress for the components, which may be repeated between batches of the circuit cards being tested.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: September 7, 1999
    Assignee: International Business Machines Corporation
    Inventors: Gerard Truman Dickinson, James Lee McGinniss, Jr., Ronald F. Tokarz, Aleksander Zubelewicz
  • Patent number: 5838568
    Abstract: An apparatus and method provides a testing process and a machine for implementing a testing process to produce failures on a heated circuit card. The apparatus and method applies a controlled, repeatable shear stress to the joints between a circuit board and its mounted components. The circuit board is heated, and one end is twisted with respect to a second end to produce stresses within the circuit board simulating those imposed on components due to thermal cycling. The apparatus may be computer controlled, for regulating the twisting of the circuit board to produce a precise twist angle during a cyclic twisting of the heated circuit board. Electrical resistance of critical joints may be monitored during the testing, and a data base compiled identifying the cycle count at which a failure occurs and location of the failure on the circuit board.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: November 17, 1998
    Assignee: International Business Machines Corporation
    Inventors: Gerard Truman Dickinson, James Lee McGinniss, Jr., Ronald F. Tokarz, Aleksander Zubelewicz
  • Patent number: 5789682
    Abstract: A mechanical deflection system (MDS) includes a torsion tester for circuit boards which imposes controlled repeatable sheer stress to a test board and components mounted thereon by cyclicly twisting the board about a center line. A self centering twisting clamp holds one edge of the board and a rotating clamp connected to a backlash free motor and servo mechanism, holds the opposite edge with a limited clamping force. A computer regulates the motor to apply either a specified maximum twist angle or maximum torque, and receives signals from an optical meter which measures the angle, and from a load cell which measures the torque. The computer is connected to detect failures by measuring the electrical resistance of critical joints during testing and it records the location and number of cycles for each failure.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: August 4, 1998
    Assignee: International Business Machines Corporation
    Inventors: Gerard Truman Dickinson, James Lee McGinniss, Jr., Ronald Francis Tokarz, Aleksander Zubelewicz
  • Patent number: 5736646
    Abstract: A mechanical deflection system (MDS) includes a torsion tester for circuit boards which imposes controlled repeatable sheer stress to a test board and components mounted thereon by cyclicly twisting the board about a center line. A self centering twisting clamp holds one edge of the board and a rotating clamp connected to a backlash free motor and servo mechanism, holds the opposite edge with a limited clamping force. A computer regulates the motor to apply either a specified maximum twist angle or maximum torque, and receives signals from an optical meter which measures the angle, and from a load cell which measures the torque. The computer is connected to detect failures by measuring the electrical resistance of critical joints during testing and it records the location and number of cycles for each failure.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: April 7, 1998
    Assignee: International Business Machines Corporation
    Inventors: Gerard Truman Dickinson, James Lee McGinniss, Jr., Ronald Francis Tokarz, Aleksander Zubelewicz
  • Patent number: 5567884
    Abstract: A torsion tester for circuit board assemblies (boards) clamps opposite edges of the board and cyclicly twists the board to provide substantially pure sheer stress in interconnection joints to SMT components for replicating failure modes due to thermal cycling. The boards are automatically centered in the clamps, the distance between the clamps is automatically measured, and the machine rotates one of the clamps to produce out-of-plane deflection which repeat within 0.01 degree per inch of the distance to provide repeatable results. During testing the maximum deflection and torque of each cycle and the location and cycle count at each failure is automatically recorded until a large population of failures is obtained. The population of failures is automatically compared to a statistical database of previous populations to identify any unusual deviations and for determining the reliability of the production process.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: October 22, 1996
    Assignee: International Business Machines Corporation
    Inventors: Gerard T. Dickinson, James L. McGinniss, Jr., Ronald F. Tokarz, Aleksander Zubelewicz