Patents by Inventor Alessandro Causio

Alessandro Causio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated device with raised locos insulation regions and process for manufacturing such device
    Patent number: 9640614
    Abstract: An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: May 2, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Causio, Paolo Colpani, Simone Dario Mariani
  • INTEGRATED DEVICE WITH RAISED LOCOS INSULATION REGIONS AND PROCESS FOR MANUFACTURING SUCH DEVICE
    Publication number: 20150054088
    Abstract: An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.
    Type: Application
    Filed: October 8, 2014
    Publication date: February 26, 2015
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Causio, Paolo Colpani, Simone Dario Mariani
  • Integrated device with raised locos insulation regions and process for manufacturing such device
    Patent number: 8941176
    Abstract: An embodiment of an integrated device includes a semiconductor body, in which an STI insulating structure is formed, laterally delimiting first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. Formed in the second active area is a power component, which includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region, arranged between the body region and the drain-contact region and having a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: January 27, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Causio, Paolo Colpani, Simone Dario Mariani
  • INTEGRATED DEVICE WITH RAISED LOCOS INSULATION REGIONS AND PROCESS FOR MANUFACTURING SUCH DEVICE
    Publication number: 20110073960
    Abstract: An embodiment of an integrated device includes a semiconductor body, in which an STI insulating structure is formed, laterally delimiting first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. Formed in the second active area is a power component, which includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region, arranged between the body region and the drain-contact region and having a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.
    Type: Application
    Filed: September 29, 2010
    Publication date: March 31, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Causio, Paolo Colpani, Simone Dario Mariani