Patents by Inventor Alessandro Cesare Callegari
Alessandro Cesare Callegari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090316096Abstract: The present invention includes a method of preparing a dry deposited liquid-crystal alignment layer using one of a mechanical mask, photo-resist, UV treatment, and ridge and fringe field methods. The present invention further provides a multi-domain, wide viewing angle liquid-crystal display, comprising: a bottom substrate; a first transparent conductive layer; a top substrate; a color filter layer; a second transparent conductive layer; a first dry deposited liquid-crystal alignment layer; a second dry deposited liquid-crystal alignment layer, the second dry deposited liquid-crystal alignment layer being spaced adjacent to and facing the first dry deposited liquid-crystal alignment layer; spacers; and a liquid-crystal material.Type: ApplicationFiled: August 27, 2009Publication date: December 24, 2009Inventors: Alessandro Cesare Callegari, Praveen Chaudhari, James Patrick Doyle, Eileen Galligan, James Andrew Lacey, Shui-Chih Alan Lien
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Publication number: 20040151911Abstract: An apparatus for depositing and aligning an amorphous film in a single step, a method of forming an aligned film on a substrate in a single step by combining the deposition and alignment of an alignment layer into a single-step using ion beam processing and an amorphous film having an aligned atomic structure prepared by a method in which an aligned film is deposited and aligned in a single step are provided. The film is deposited and aligned in a single step by bombarding a substrate with an ion beam at a designated incident angle to simultaneously (a) deposit the film onto the substrate and (b) arrange an atomic structure of the film in at least one predetermined aligned direction.Type: ApplicationFiled: September 11, 2003Publication date: August 5, 2004Inventors: Alessandro Cesare Callegari, Praveen Chaudhari, James Patrick Doyle, Eileen Ann Galligan, Yoshimine Kato, James Andrew Lacey, Shui-Chih Alan Lien, Minhua Lu, Hiroki Nakano, Shuichi Odahara
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Patent number: 6770500Abstract: A process of passivating a metal-gated CMOS structure in which a metal-gated CMOS structure is passivated in an atmosphere of molecular hydrogen at a temperature of between about 250° C. and about 500° C. and a pressure of at least about 200 Torr. The present process provides a lower interface state density than obtainable by prior art passivation processes.Type: GrantFiled: March 15, 2002Date of Patent: August 3, 2004Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Christopher P. D'emic, Hyungjun Kim, Fenton Read McFeely, Vijay Narayanan, John Jacob Yurkas
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Patent number: 6632483Abstract: The present invention includes a method of forming an aligned film on a substrate. The film is deposited and aligned in a single step by a method comprising the step of bombarding a substrate with an ion beam at a designated incident angle to simultaneously (a) deposit the film onto the substrate and (b) arrange an atomic structure of the film in at least one predetermined aligned direction.Type: GrantFiled: June 30, 2000Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Praveen Chaudhari, James Patrick Doyle, Eileen Ann Galligan, Yoshimine Kato, James Andrew Lacey, Shui-Chih Alan Lien, Minhua Lu, Hiroki Nakano, Shuichi Odahara
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Publication number: 20030186518Abstract: A process of passivating a metal-gated CMOS structure in which a metal-gated CMOS structure is passivated in an atmosphere of molecular hydrogen at a temperature of between about 250° C. and about 500° C. and a pressure of at least about 200 Torr. The present process provides a lower interface state density than obtainable by prior art passivation processes.Type: ApplicationFiled: March 15, 2002Publication date: October 2, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Alessandro Cesare Callegari, Christopher P. D'emic, Hyungjun Kim, Fenton Read McFeely, Vijay Narayanan, John Jacob Yurkas
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Patent number: 6577011Abstract: The present invention includes a multilevel air-gap-containing interconnect wiring structure including: a collection of interspersed line levels and via levels, the via levels and line levels containing conductive via and line features embedded in a dielectric having an air-gap and solid dielectric. The air-gap and solid dielectric includes (i) one or more solid dielectrics only in the shadows of the conductive features in overlying levels and (ii) a gaseous dielectric elsewhere in the structure. The collection of line levels and via levels are topped by a laminated thin, taut insulating cover layer having openings to selected conductive features in the topmost underlying line or via layer, and the openings are filled with conductive material connecting to terminal pad contacts on the insulating cover layer.Type: GrantFiled: November 17, 2000Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Leena P. Buchwalter, Alessandro Cesare Callegari, Stephan Alan Cohen, Teresita Ordonez Graham, John P. Hummel, Christopher V. Jahnes, Sampath Purushothaman, Katherine Lynn Saenger, Jane Margaret Shaw
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Patent number: 6428894Abstract: Disclosed is vapor deposited BARC and method of preparing tunable and removable antireflective coatings based on amorphous carbon films. These films can be hydrogenated, fluorinated, nitrogenated carbon films. Such films have an index of refraction and an extinction coefficient tunable from about 1.4 to about 2.1 and from about 0.1 to about 0.6, respectively, at UV and DUV wavelengths, in particular 365, 248 and 193 nm. Moreover, the films produced by the present invention can be deposited over device topography with high conformality, and they are etchable by oxygen and/or a fluoride ion etch process. Because of their unique properties, these films can be used to form a tunable and removable antireflective coating at UV and DUV wavelengths to produce near zero reflectance at the resist/BARC coating interface. This BARC greatly improves performance of semiconductor chips.Type: GrantFiled: June 4, 1997Date of Patent: August 6, 2002Assignee: International Business Machines CorporationInventors: Katherina E. Babich, Alessandro Cesare Callegari, Julien Fontaine, Alfred Grill, Christopher V. Jahnes, Vishnubhai Vitthalbhai Patel
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Patent number: 6413386Abstract: Within a method for forming a metal-silicon layer there is first provided a reactor chamber. There is then positioned within the reactor chamber a substrate spaced from a metal source target. There is also provided within the reactor chamber a minimum of a sputter material and a reactive silicon material. There is then sputtered the metal source target positioned within the reactor chamber with the sputter material provided within the reactor chamber in the presence of the reactive silicon material provided within the reactor chamber to form a metal-silicon layer over the substrate. The method is particularly useful for forming metal silicate layers, metal silicon nitride layers and metal silicon oxynitride layers within microelectronic fabrications. An alternative method employs: (1) a silicon source target rather than a metal source target; and (2) a reactive metal material rather than a reactive silicon material.Type: GrantFiled: July 19, 2000Date of Patent: July 2, 2002Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Eduard Albert Cartier, Michael Abramovich Gribelyuk, Harald Franz Okorn-Schmidt, Theodore Harold Zabel
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Patent number: 6395650Abstract: Within: (1) a method for purifying a metal oxide layer; and (2) a method for forming with enhanced purity a metal oxide layer, there is employed an irradiation of either: (1) a metal oxide layer; or (2) a substrate in the presence of at least one of an oxidant and a metal source material, such as to either: (1) reduce a concentration of a contaminant material within a metal oxide base material from which is formed a metal oxide layer; or (2) inhibit in a first instance formation of a contaminant material within a metal oxide layer. The metal oxide layer having incorporated therein the reduced concentration of contaminant material is particularly useful as a capacitive dielectric layer within a capacitive device within a microelectronic fabrication.Type: GrantFiled: October 23, 2000Date of Patent: May 28, 2002Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Fuad Elias Doany, Evgeni Petrovich Gousev, Theodore Harold Zabel
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Publication number: 20010015438Abstract: The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C.Type: ApplicationFiled: December 18, 2000Publication date: August 23, 2001Applicant: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Christos Dimitrios Dimitrakopoulos, Sampath Purushothaman
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Patent number: 6207472Abstract: The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C. A TFT of the invention has a pentacene semiconductor layer in contact with a barium zirconate titanate gate oxide layer formed on a polycarbonate transparent substrate employing at least one of the techniques of sputtering, evaporation and laser ablation.Type: GrantFiled: March 9, 1999Date of Patent: March 27, 2001Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Christos Dimitrios Dimitrakopoulos, Sampath Purushothaman
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Patent number: 6184121Abstract: A method to achieve a very low effective dielectric constant in high performance back end of the line chip interconnect wiring and the resulting multilayer structure are disclosed. The process involves fabricating the multilayer interconnect wiring structure by methods and materials currently known in the state of the art of semiconductor processing; removing the intralevel dielectric between the adjacent metal features by a suitable etching process; applying a thin passivation coating over the exposed etched structure; annealing the etched structure to remove plasma damage; laminating an insulating cover layer to the top surface of the passivated metal features; optionally depositing an insulating environmental barrier layer on top of the cover layer; etching vias in the environmental barrier layer, cover layer and the thin passivation layer for terminal pad contacts; and completing the device by fabricating terminal input/output pads.Type: GrantFiled: July 9, 1998Date of Patent: February 6, 2001Assignee: International Business Machines CorporationInventors: Leena P. Buchwalter, Alessandro Cesare Callegari, Stephan Alan Cohen, Teresita Ordonez Graham, John P. Hummel, Christopher V. Jahnes, Sampath Purushothaman, Katherine Lynn Saenger, Jane Margaret Shaw
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Patent number: 6061114Abstract: Bombardment of the surface of a substrate with a film layer is used to create alignment layers for liquid crystal displays. By using bombardment of the surface at an angle, both direct creation of the alignment layer or indirect deposition of the alignment layer material onto a glass plate can be achieved.Type: GrantFiled: February 23, 1998Date of Patent: May 9, 2000Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Praveen Chaudhari, James Patrick Doyle, James Andrew Lacey, Shui-Chin Alan Lien, Sampath Purushothaman, Mahesh Govind Samant, James L. Speidell, Joachim Stohr
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Patent number: 6020946Abstract: The present invention is a method for forming a liquid-crystal cell of a liquid-crystal display. Initially, a dry processed alignment film is deposited onto a first transparent substrate using a dry processing technique, such as plasma enhanced chemical vapor deposition (PECVD). The dry processed alignment film is then irradiated with a beam of atoms to arrange the atomic structure of the alignment film in at least one desired direction in order to orient the liquid-crystal molecules. Another dry processed alignment film is deposited on a second substrate using a dry processing technique and, likewise, irradiated with a beam of atoms. The first transparent substrate and the second substrate are then sandwiched together with their respective alignment films spaced adjacent to each other. The space between the films is then filled with a liquid-crystal material.Type: GrantFiled: February 23, 1998Date of Patent: February 1, 2000Assignee: International Business Machines CorporationInventors: Alessandro Cesare Callegari, Praveen Chaudhari, James Patrick Doyle, James Andrew Lacey, Shui-Chin Alan Lien, Sampath Purushothaman, Mahesh Govind Samant, James L. Speidell, Joachim Stohr
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Patent number: 5830332Abstract: The present invention relates to a method of reactive sputtering for depositing an amorphous hydrogenated carbon film (a-C:H) from an argon/hydrocarbon/hydrogen/oxygen plasma, preferably an Ar/acetylene-helium/hydrogen/oxygen plasma. Such films are optically transparent in the visible range and partially absorbing at ultraviolet (UV) and deep UV (DUV) wavelengths, in particular, 365, and 248, 193 nm. Moreover, the films produced by the present invention are amorphous, hard, scratch resistant, and etchable by excimer laser ablation or by oxygen reactive ion etch process. Because of these unique properties, these films can be used to form a patterned absorber for UV and DUV single layer attenuated phase shift masks. Film absorption can also be increased such that these films can be used to fabricate conventional photolithographic shadow masks.Type: GrantFiled: January 9, 1997Date of Patent: November 3, 1998Assignee: International Business Machines CorporationInventors: Edward D. Babich, Alessandro Cesare Callegari, Fuad Elias Doany, Sampath Purushothaman