Abstract: An ultrasonic transducer array including a substrate, a membrane overlying the substrate, the membrane configured to allow movement at ultrasonic frequencies, and a plurality of anchors connected to the substrate and connected to the membrane. The membrane includes a piezoelectric layer, a plurality of first electrodes, and a plurality of second electrodes, wherein each ultrasonic transducer of a plurality of ultrasonic transducers includes at least a first electrode and at least a second electrode. The plurality of anchors includes a first anchor including a first electrical connection for electrically coupling at least one first electrode to control circuitry and a second anchor including a second electrical connection for electrically coupling at least one second electrode. The ultrasonic transducer array could be either a two-dimensional array or a one-dimensional array of ultrasonic transducers.

Abstract: An ultrasonic transducer device including a substrate, an edge support structure connected to the substrate, and a membrane connected to the edge support structure such that a cavity is defined between the membrane and the substrate, the membrane configured to allow movement at ultrasonic frequencies. The membrane includes a structural layer, a piezoelectric layer having a first surface and a second surface, a first electrode placed on the first surface of the piezoelectric layer, wherein the first electrode is located at the center of the membrane, a second electrode placed on the first surface of the piezoelectric layer, wherein the second electrode is a patterned electrode comprising more than one electrode components that are electrically coupled, and a third electrode coupled to the second surface of the piezoelectric layer and electrically coupled to ground.

Abstract: A method of detecting objects of interest in a vehicle image processing system comprising: a) capturing an image on a camera; b) providing a plurality of potential candidate windows by running a detection window at spatially different locations along said image, and repeating this at different image scaling relative to the detection window size; c) for each potential candidate window applying a candidate selection process adapted to select one or more candidates from said potential candidate windows; d) forwarding the candidates determined form step c) to a convolutional neural network (CNN) process; e) processing the candidates to identify objects of interest; characterized wherein the candidate input into the convolutional neural network (CNN) process have been resized by step b).

Abstract: An electric power distribution switchboard (1) in which one or more functional units are equipped with a switching device compartment (3) that integrates primary and secondary functions. Within the switching device compartment (3) are included, together with the switching device (37), the current and voltage sensors (36), the position sensors for interlocking, a human machine interface (HMI) and an Intelligent Electronic Device (IED) (4) and the related local configuration point (32) to configure the IED (4). The IED (4) realizes functional unit supervision, control, protection, communication and monitoring and acts as a concentrating point of functional unit information and decisions. The switchboard (1) of the invention further comprises power supply section, an I/O section and a communication system.

Abstract: Disclosed is a method for controlling the peak power of a filtered signal in a single carrier data transmission system. The method comprises the steps of receiving a digital sequence (13) from a data source; generating a new digital sequence (a(k)); shaping filtering (34) the new digital sequence (a(k)) and producing a filtered digital sequence (y(k)) Characterized in that the step of generating a new digital sequence (a(k)) comprises the steps of: encoding data by an algebraic error correcting code (28); and performing a bit modification (30) by deliberately adding errors in such a way that the peak power of the filter signal affected by the deliberately introduced errors is lower than the peak power of the signal unaffected by errors. Disclosed is also a circuit for performing the method.

Abstract: A circuit breaker (100), in particular a medium voltage circuit breaker, having a current (20) and/or a voltage measuring device (30) integrated thereon. The integration can be functional and/or physical. The functionally integrated current and/or voltage measuring device provides primary current and voltage representative signals to an on-board electronic device (50) in order to realize the measure, process, and protection functions as a whole.

Abstract: A method for calibrating voltage sensors in a switchboard, using a communication bus which comprises the following steps: i. performing a measurement using a first voltage sensor; ii. transmitting an information derived from said measurement to an electronic device, through the communication bus; iii. using said information to calibrate a second voltage sensor.

Abstract: A method for calibrating voltage sensors in a switchboard, using a communication bus which comprises the following steps: i. performing a measurement using a first voltage sensor; ii. transmitting an information derived from said measurement to an electronic device, through the communication bus; iii. using said information to calibrate a second voltage sensor.

Abstract: A circuit breaker (100), in particular a medium voltage circuit breaker, having a current (20) and/or a voltage measuring device (30) integrated thereon. The integration can be functional and/or physical. The functionally integrated current and/or voltage measuring device provides primary current and voltage representative signals to an on-board electronic device (50) in order to realize the measure, process, and protection functions as a whole.

Abstract: An electric power distribution switchboard (I) in which one or more functional units are equipped with a switching device compartment (3) that integrates primary and secondary functions. Within the switching device compartment (3) are included, together with the switching device (37), the current and voltage sensors (36), the position sensors for interlocking, a human machine interface (HMI) and an Intelligent Electronic Device (IED) (4) and the related local configuration point (32) to configure the IED (4). The IED (4) realizes functional unit supervision, control, protection, communication and monitoring and acts as a concentrating point of functional unit information and decisions. The switchboard (1) of the invention further comprises power supply section, an I/O section and a communication system.

Abstract: Disclosed is a method for controlling the peak power of a filtered signal in a single carrier data transmission system. The method comprises the steps of receiving a digital sequence (13) from a data source; generating a new digital sequence (a(k)); shaping filtering (34) the new digital sequence (a(k)) and producing a filtered digital sequence (y(k)) Characterized in that the step of generating a new digital sequence (a(k)) comprises the steps of: encoding data by an algebraic error correcting code (28); and performing a bit modification (30) by deliberately adding errors in such a way that the peak power of the filter signal affected by the deliberately introduced errors is lower than the peak power of the signal unaffected by errors. Disclosed is also a circuit for performing the method.

Abstract: The damaging effects caused by an abrupt rise of the supply voltage on particularly sensitive circuits when power is returned to the distribution network after a blackout, are prevented by providing the power supply with means for controlling a gradual rise of the output voltage thereof in accordance with a pre-established ramp when the power supply is switched-on. These means utilize a microprocessor driving at least one low-to-high type level shifter having a load formed by a network of resistors with scaled values, for generating an output analog voltage signal corresponding to a digital value presented by the microprocessor at the logic gate driving the level shifter circuit. The analog voltage signal, properly buffered, is applied to a control terminal of the power supply.