Patents by Inventor Alessandro Fabbri

Alessandro Fabbri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8619553
    Abstract: The present disclosure provides systems and methods for mesh restoration based on Associated Hop Designated Transit Lists (DTLs). The Associated Hop DTLs are calculated through a global restoration calculation (GRC) algorithm that can be run by a central controller in an offline manner. The restoration paths calculated by the GRC algorithm can then be pushed down to the originating nodes for each connection to utilize at the time of a given failure scenario. This GRC algorithm can be performed for each possible bundle failure in the network, where a bundle failure is determined by the set of all links which may fail together due to common shared risk, such as a common conduit or DWDM fiber. The globally calculated, contention free, restoration paths are then pushed down to each node in the network.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: December 31, 2013
    Assignee: Ciena Corporation
    Inventors: Vagish Madrahalli, Alessandro Fabbri, John Oltman
  • Patent number: 8045481
    Abstract: The present invention provides systems and methods for abstracting a network topology into virtual links and supporting both generic and instantiated virtualized links for linking a virtualized topology with actual resources within a domain, providing security over network topology information, providing control over the allocation of resources, and reducing the complexity of advertising.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: October 25, 2011
    Assignee: Ciena Corporation
    Inventors: Lyndon Y. Ong, Neena Aluri, Alessandro Fabbri, Steven P. Curtis, Vagish Madrahalli, Yalin Wang
  • Patent number: 7869427
    Abstract: The invention includes systems and methods for improving the performance of non-blocking data switching systems. One embodiment of the invention includes a method comprising routing data from a plurality of inputs to a plurality of outputs through a switching core according to a first switching schedule, receiving a first set of reports comprising reports from data sources associated with the plurality of inputs, evaluating one or more reports of the first set of reports, determining a sufficiency of the first switching schedule based on the one or more reports, adapting a second switching schedule, wherein the second switching schedule differs from the first switching schedule, sending the second switching schedule to the data sources, issuing one or more synchronization signals associated with a transition to the second switching schedule to the data sources and routing data from the plurality of inputs to the plurality of outputs through the switching core according to the second switching schedule.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 11, 2011
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20100172236
    Abstract: The present disclosure provides systems and methods for mesh restoration based on Associated Hop Designated Transit Lists (DTLs). The Associated Hop DTLs are calculated through a global restoration calculation (GRC) algorithm that can be run by a central controller in an offline manner. The restoration paths calculated by the GRC algorithm can then be pushed down to the originating nodes for each connection to utilize at the time of a given failure scenario. This GRC algorithm can be performed for each possible bundle failure in the network, where a bundle failure is determined by the set of all links which may fail together due to common shared risk, such as a common conduit or DWDM fiber. The globally calculated, contention free, restoration paths are then pushed down to each node in the network.
    Type: Application
    Filed: January 8, 2009
    Publication date: July 8, 2010
    Inventors: Vagish MADRAHALLI, Alessandro Fabbri, John Oltman
  • Patent number: 7715712
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: May 11, 2010
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7496033
    Abstract: Methods and systems for dynamically computing a schedule defining interconnections between ports in a switching system. In one embodiment, a switching core requests demand reports from the ingress ports. In response to this request, the ingress ports generate a series of suggested port schedules, beginning with a first choice, then a second choice, and so on. The schedules are transmitted to the switching core, beginning with the first choice. The switching core receives the first choice for each of the ports and determines whether the aggregate schedule defined by the first choices is valid. If the aggregate schedule is valid, then this schedule is implemented. If the aggregate schedule is not valid, portions of it are discarded and the next choice from each of the ports is examined to identify connections to replace the discarded portions. This process is repeated until a valid schedule is obtained.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: February 24, 2009
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20090028560
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Application
    Filed: August 4, 2008
    Publication date: January 29, 2009
    Applicant: YT NETWORKS CAPITAL, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7474853
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: January 6, 2009
    Assignee: YT Networks Capital, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20080095176
    Abstract: The present invention provides systems and methods for abstracting a network topology into virtual links and supporting both generic and instantiated virtualized links for linking a virtualized topology with actual resources within a domain, providing security over network topology information, providing control over the allocation of resources, and reducing the complexity of advertising.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 24, 2008
    Inventors: Lyndon Y. Ong, Neena Aluri, Alessandro Fabbri, Steven P. Curtis, Vagish Madrahalli, Yalin Wang
  • Publication number: 20070206604
    Abstract: The invention includes systems and methods for improving the performance of non-blocking data switching systems. One embodiment of the invention includes a method comprising routing data from a plurality of inputs to a plurality of outputs through a switching core according to a first switching schedule, receiving a first set of reports comprising reports from data sources associated with the plurality of inputs, evaluating one or more reports of the first set of reports, determining a sufficiency of the first switching schedule based on the one or more reports, adapting a second switching schedule, wherein the second switching schedule differs from the first switching schedule, sending the second switching schedule to the data sources, issuing one or more synchronization signals associated with a transition to the second switching schedule to the data sources and routing data from the plurality of inputs to the plurality of outputs through the switching core according to the second switching schedule.
    Type: Application
    Filed: April 27, 2007
    Publication date: September 6, 2007
    Inventors: Robert Best, Ramaswamy Chandrasekaran, John Rudin, Rose Hu, Jeff Watson, Lakshman Tamil, Alessandro Fabbri
  • Patent number: 7218637
    Abstract: An architecture and related systems for improving the performance of non-blocking data switching systems. In one embodiment, a switching system includes an optical switching core coupled to a plurality of edge units, each of which has a set of ingress ports and a set of egress ports. The switching system also contains a scheduler that maintains two non-blocking data transfer schedules, only one of which is active at a time. Data is transferred through the switching system according to the active schedule. The scheduler monitors the sufficiency of data transferred according to the active schedule and, if the currently active schedule is insufficient, the scheduler recomputes the alternate schedule based on demand data received from the edges/ports and activates the alternate schedule. A timing mechanism is employed to ensure that the changeover to the alternate schedule is essentially simultaneous among the components of the system.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: May 15, 2007
    Assignee: Yotta Networks, LLC
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Patent number: 7190900
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: March 13, 2007
    Assignee: Lighthouse Capital Partners IV, LP
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20060245423
    Abstract: Methods and systems for dynamically computing a schedule defining interconnections between ports in a switching system. In one embodiment, a switching core requests demand reports from the ingress ports. In response to this request, the ingress ports generate a series of suggested port schedules, beginning with a first choice, then a second choice, and so on. The schedules are transmitted to the switching core, beginning with the first choice. The switching core receives the first choice for each of the ports and determines whether the aggregate schedule defined by the first choices is valid. If the aggregate schedule is valid, then this schedule is implemented. If the aggregate schedule is not valid, portions of it are discarded and the next choice from each of the ports is examined to identify connections to replace the discarded portions. This process is repeated until a valid schedule is obtained.
    Type: Application
    Filed: June 15, 2006
    Publication date: November 2, 2006
    Inventors: Robert Best, Ramaswamy Chandrasekaran, John Rudin, Rose Hu, Jeff Watson, Lakshman Tamil, Alessandro Fabbri
  • Patent number: 7106697
    Abstract: Methods and systems for dynamically computing a schedule defining interconnections between ports in a switching system. In one embodiment, a switching core requests demand reports from the ingress ports. In response to this request, the ingress ports generate a series of suggested port schedules, beginning with a first choice, then a second choice, and so on. The schedules are transmitted to the switching core, beginning with the first choice. The switching core receives the first choice for each of the ports and determines whether the aggregate schedule defined by the first choices is valid. If the aggregate schedule is valid, then this schedule is implemented. If the aggregate schedule is not valid, portions of it are discarded and the next choice from each of the ports is examined to identify connections to replace the discarded portions. This process is repeated until a valid schedule is obtained.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: September 12, 2006
    Assignee: Lighthouse Capital Partners, IV, LP
    Inventors: Robert E. Best, Ramaswamy Chandrasekaran, John R. Rudin, III, Rose Q. Hu, Jeff L. Watson, Lakshman S. Tamil, Alessandro Fabbri
  • Publication number: 20060092937
    Abstract: A non-blocking optical matrix core switching method that includes maintaining a schedule for routing data through an optical matrix core and receiving and analyzing reports from peripheral devices. The method determines whether the schedule is adequate for the current data traffic patterns and if the schedule is not adequate a new schedule is implemented. The new schedule is then transferred to the peripheral devices for implementation and the new schedule is transferred to the optical matrix core scheduler. Implementation of the new schedule as the schedule on the peripheral devices and the optical matrix core scheduler is then performed.
    Type: Application
    Filed: December 12, 2005
    Publication date: May 4, 2006
    Inventors: Robert Best, Ramaswamy Chandrasekaran, John Rudin, Rose Hu, Jeff Watson, Lakshman Tamil, Alessandro Fabbri