Patents by Inventor Alessandro Morari

Alessandro Morari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10990587
    Abstract: A system and method of storing and analyzing information is disclosed. The system includes a compiler layer to convert user queries to data parallel executable code. The system further includes a library of multithreaded algorithms, processes, and data structures. The system also includes a multithreaded runtime library for implementing compiled code at runtime. The executable code is dynamically loaded on computing elements and contains calls to the library of multithreaded algorithms, processes, and data structures and the multithreaded runtime library.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: April 27, 2021
    Assignee: Battelle Memorial Institute
    Inventors: John T. Feo, David J. Haglin, Alessandro Morari, Antonino Tumeo, Oreste Villa, Jesse R. Weaver
  • Patent number: 10877812
    Abstract: A plurality of hardware accelerators are interconnected and include a special processing unit and accelerator memory. At least one host computer is coupled to each of the plurality of hardware accelerators and includes a general processing unit and host memory. The plurality of hardware accelerators exchange data in a ring communication pattern in computing a linear layer of a neural network.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Patrick D.M. Siegl, Fabio Checconi, Daniele Buono, Alessandro Morari
  • Publication number: 20200394186
    Abstract: A method for context-aware data mining of a text document includes receiving a list of words parsed and preprocessed from an input query; computing a related distributed embedding representation for each word in the list of words using a word embedding model of the text document being queried; aggregating the related distributed embedding representations of all words in the list of words to represent the input query with a single embedding, by using one of an average of all the related distributed embedding representations or a maximum of all the related distributed embedding representations; retrieving a ranked list of document segments of N lines that are similar to the aggregated word embedding representation of the query, where N is a positive integer provided by the user; and returning the list of retrieved segments to a user.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 17, 2020
    Inventors: GIACOMO DOMENICONI, EUN KYUNG LEE, ALESSANDRO MORARI
  • Publication number: 20200302334
    Abstract: A data index sequence indexing a dataset is received. A location of a data sample identified by a data index in the data index sequence is determined. A scheme is generated for specifying a data movement based on the location. Responsive to determining that the location is a cache of a process, the data sample in the cache can be reused without having to load the data sample from a storage device.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 24, 2020
    Inventors: Chih-Chieh Yang, Guojing Cong, Bilge Acun, Alessandro Morari
  • Patent number: 10761583
    Abstract: An application to run on a computer node comprising a plurality of hardware components is received. Expected performance of the hardware components is received. A power shifting ratio associated with each of the plurality of hardware components for each phase of the application is determined. Power between the hardware components is dynamically shifted based on the power shifting ratio at different phases of the application.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: September 1, 2020
    Assignee: International Business Machines Corporation
    Inventors: Eun Kyung Lee, Bilge Acun, Yoonho Park, Alessandro Morari, Alper Buyuktosunoglu
  • Publication number: 20200192799
    Abstract: An approach is disclosed that maintains a consistent view of a virtual address by a local node which writes a first value to the virtual address and, after writing the first value, establishes a snapshot consistency state of the virtual address. The virtual address is shared amongst any number of processes and the processes includes a writing process and other processes that read from the virtual address. After writing the first value, the writing process writes a second value to the virtual address. Even after writing the second value, the first value is still visible to the other processes.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Inventors: Charles R. Johns, James A. Kahle, Martin Ohmacht, Changhoan Kim, Jose R. Brunheroto, Constantinos Evangelinos, Abdullah Kayi, Alessandro Morari, James C. Sexton, Patrick D. Siegl
  • Publication number: 20200081513
    Abstract: An application to run on a computer node comprising a plurality of hardware components is received. Expected performance of the hardware components is received. A power shifting ratio associated with each of the plurality of hardware components for each phase of the application is determined. Power between the hardware components is dynamically shifted based on the power shifting ratio at different phases of the application.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventors: Eun Kyung Lee, Bilge Acun, Yoonho Park, Alessandro Morari, Alper Buyuktosunoglu
  • Publication number: 20200081744
    Abstract: A plurality of hardware accelerators are interconnected and include a special processing unit and accelerator memory. At least one host computer is coupled to each of the plurality of hardware accelerators and includes a general processing unit and host memory. The plurality of hardware accelerators exchange data in a ring communication pattern in computing a linear layer of a neural network.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 12, 2020
    Inventors: Patrick D.M. Siegl, Fabio Checconi, Daniele Buono, Alessandro Morari
  • Publication number: 20190057128
    Abstract: A system and method of storing and analyzing information is disclosed. The system includes a compiler layer to convert user queries to data parallel executable code. The system further includes a library of multithreaded algorithms, processes, and data structures. The system also includes a multithreaded runtime library for implementing compiled code at runtime. The executable code is dynamically loaded on computing elements and contains calls to the library of multithreaded algorithms, processes, and data structures and the multithreaded runtime library.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Applicant: Battelle Memorial Institute
    Inventors: John T. Feo, David J. Haglin, Alessandro Morari, Antonino Tumeo, Oreste Villa, Jesse R. Weaver
  • Patent number: 10146828
    Abstract: A system and method of storing and analyzing information is disclosed. The system includes a compiler layer to convert user queries to data parallel executable code. The system further includes a library of multithreaded algorithms, processes, and data structures. The system also includes a multithreaded runtime library for implementing compiled code at runtime. The executable code is dynamically loaded on computing elements and contains calls to the library of multithreaded algorithms, processes, and data structures and the multithreaded runtime library.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: December 4, 2018
    Assignee: Battelle Memorial Institute
    Inventors: John T. Feo, David J. Haglin, Alessandro Morari, Antonino Tumeo, Oreste Villa, Jesse R. Weaver
  • Publication number: 20160026677
    Abstract: A system and method of storing and analyzing information is disclosed. The system includes a compiler layer to convert user queries to data parallel executable code. The system further includes a library of multithreaded algorithms, processes, and data structures. The system also includes a multithreaded runtime library for implementing compiled code at runtime. The executable code is dynamically loaded on computing elements and contains calls to the library of multithreaded algorithms, processes, and data structures and the multithreaded runtime library.
    Type: Application
    Filed: July 23, 2014
    Publication date: January 28, 2016
    Inventors: John T. Feo, David J. Haglin, Alessandro Morari, Antonino Tumeo, Oreste Villa, Jesse R. Weaver