Abstract: An apparatus includes a temperature sensor, a digitally-controlled capacitor and a processor. The temperature sensor is coupled to a crystal oscillator and configured to generate an input signal depending on a temperature of the crystal oscillator. The digitally-controlled capacitor is connected to the crystal oscillator and configured to receive a control signal and, based on the control signal, to control a frequency of an output signal generated by the crystal oscillator. The processor is configured to receive the input signal from the temperature sensor, to convert the input signal into the control signal based on parameters that characterize the crystal oscillator and the digitally-controlled capacitor, and to apply the control signal to the digitally-controlled capacitor.

Abstract: A power rectifier rectifies alternating electric current by using a controller in the power rectifier to control a first delay circuit in the power rectifier to turn on a high side switch in the power rectifier, wherein the high side switch provides a path for power from an input voltage line of the power rectifier to an output voltage line of the power rectifier. The controller controls a second delay circuit in the power rectifier to maintain the high side switch in an on state to change a switching state of the high side switch based on detection, by a current inversion detector, of a current inversion associated with the input and output voltage lines of the power rectifier.

Abstract: Aspects of the disclosure provide an apparatus having a first connector and a signal processing circuit. The first connector is configured to receive a second connector so that connecting terminals at respective portions of the first and second connectors are coupled together. The signal processing circuit is configured to generate a first output signal at a first amplification gain, determine a first load resistance value at a first connecting terminal of the second connector that is configured to receive the first output signal when coupled to the first connector, and set the first amplification gain based on the first load resistance value.

Abstract: A power rectifier rectifies alternating electric current by using a controller in the power rectifier to control a first delay corresponding to a first delay circuit in the power rectifier to turn on a high side switch in the power rectifier, wherein the high side switch provides a path for power from an input voltage line of the power rectifier to an output voltage line of the power rectifier. The controller controls a second delay corresponding to a second delay circuit in the power rectifier to maintain the high side switch in an on state so as to change a switching state of the high side switch based on detection, by a current inversion detector, of a current inversion associated with the input and output voltage lines of the power rectifier.

Abstract: Aspects of the disclosure provide a circuit. The circuit includes a current generator, a capacitor, a comparator, a switch and a clock generator logic. The current generator is configured to generate a current proportional to a comparator threshold voltage by a ratio. The capacitor is configured to be charged by the current to have a capacitor voltage. The comparator is configured to compare the capacitor voltage with the comparator threshold voltage. The switch is configured to discharge the capacitor based on the comparison. The clock generator logic is configured to generate a clock signal based on the comparison, such that a frequency of the clock signal is a function of the ratio and is independent of the current and the comparator threshold voltage.

Abstract: In one embodiment, an RC oscillator is provided. The oscillator includes a current generator circuit configured to generate a current. A capacitor is configured to be charged by the current. An inverter includes an input coupled to the capacitor. An output of the inverter goes high when a voltage across the capacitor reaches a threshold voltage of the inverter. A switch coupled to the output of the inverter and the capacitor is configured to close when the output of the inverter goes high. This discharges the capacitor. The output of the inverter goes low when the capacitor is discharged and the switch is opened. Clock generator logic is configured to receive the output of the inverter and generate a clock signal. The current is proportional to the threshold voltage of the inverter.

Abstract: A read and analog-to-digital data conversion channel includes an input circuit receiving an input data stream, and a time interleaved analog-to-digital converter connected to the input circuit. The time interleaved analog-to-digital converter includes a pair of analog-to-digital converters functioning in parallel and at half the clock frequency. A signal path through the time interleaved analog-to-digital converter is subdivided into two parallel paths through the pair of analog-to-digital converters. There is a first path for even bits and a second path for odd bits. A digital post-processing circuit is connected to the two parallel paths of the time interleaved analog-to-digital converter, and has an output providing a reconstructed data stream. At least one adjusting digital-to-analog converter is connected between the digital post-processing circuit and the input circuit for control thereof.

Abstract: The method is for controlling a voice coil motor which drives a mechanical arm via a control circuit which sets the output nodes, to which the motor is connected, in a high impedance state for a certain time interval. The method and circuit detect the back electromotive force induced on the motor winding during the time interval, and deliver current pulses for driving the motor. The circuit compares the detected back electromotive force with a certain target value and regulates the amplitude of the driving current pulses as a function of the difference between the detected value of the back electromotive force and a voltage signal representing the desired speed of the arm, according to a pre-established function. A preferred embodiment includes such a function being a pre-established saturated linear characteristic with an offset value.

Abstract: A switching regulator having a switching element, a control loop for varying a duty cycle of the switching element according to a difference between a switching regulator output electric quantity and a target output electric quantity, and a digital soft start-up circuit for digitally controlling the duty cycle of the switching element, independently from said difference, in a start-up phase of the switching regulator operation.

Abstract: A programmable-gain multistage amplifier with broad bandwidth and reduced phase variations having a differential input stage biased by a first current source and to which a differential voltage signal is fed, the stage being connected to a pair of diodes in which the cathode terminals are connected to respective bipolar transistors, which are biased by a second current source and in which the collector terminals are connected to load resistors, the differential output of the amplifier being provided at the collector terminals of the bipolar transistors.

Abstract: A driver circuit includes a half-bridge output stage including two transistors with a common terminal for connection as the driver output to a coil of a DC motor. Two amplifiers drive the transistors in the push-pull operation and two capacitors are connected between the driver output and one input of a respective amplifier to form feedback loops for controlling the output slew-rate. Two current generators are selectively connected to an input of either of the amplifiers through respective pairs of switches. A commutation sequencer turns on and off the switches according to a commutation program. Comparators are connected to the drive output for detecting predetermined output voltage conditions and providing the commutation sequencer with signals for conditioning the commutation program as a function of the detected voltage conditions.

Abstract: An amplifier with programmable gain and input linearity at high frequency allows an increase in the gain without effecting input linearity and without significantly increasing current consumption. The amplifier includes an input stage which receives a voltage signal for performing a current conversion thereof with compression. An output stage is connected to the input stage and decompresses the signal provided by the input stage for producing gain amplification thereof. The amplifier further includes at least one current amplifier stage interposed between the input stage and the output stage. The at least one current amplifier includes at least one bipolar transistor series-connected to a load diode and to a current source. A reduction in the transconductance of the load diode is provided in the at least one amplifier stage to determine a programmable gain factor for the amplifier.