Abstract: A self-biased cascode current mirror circuit, including a first transistor having a first current electrode, a control electrode, and a second current electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the first current electrode of the first transistor, and a second current electrode coupled to a terminal; a third transistor having a first current electrode configured to provide an output current, a control electrode coupled to the control electrode of the first transistor and the first current electrode of the third transistor, and a second current electrode; and a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a control electrode coupled to the control electrode of the second transistor, and a second current electrode coupled to the terminal.

Abstract: A phase detector receives an oscillating signal and a clock signal, and outputs a differential signal representing a phase difference therebetween. The phase detector includes a first differential pair of transistors respectively driven by the clock signal and by an inverted clock signal for generating the differential signal. An auxiliary differential pair of transistors is coupled to the first differential pair of transistors and is respectively driven by the oscillating signal and by an inverted oscillating signal. A current generator biases the first differential pair of transistors and the auxiliary differential pair of transistors.

Abstract: A linear phase detector has a variable gain that is regulated as a function of the monitored transition density of the input signal. The transition density is sensed by a circuit that generates a signal corresponding to a time averaged common mode component of the differential signal output by an output stage of the phase detector.