Patents by Inventor Alex G. Tang
Alex G. Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10303598Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory. The controller generally includes a processor, a cache and a hardware assist circuit. The processor may be configured to initiate a recycle operation by generation of a start index. The cache may be configured to buffer a first level of a map and less than all of a second level of the map. The hardware assist circuit may be configured to search through the first level or any portions of the second level of the map in the cache in response to the start index, and notify the processor in response to the search detecting one or more blocks in the memory that contain valid data to be recycled.Type: GrantFiled: June 29, 2016Date of Patent: May 28, 2019Assignee: Seagate Technology LLCInventors: Timothy Canepa, Leonid Baryudin, Stephen D. Hanna, Alex G. Tang
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Patent number: 10048879Abstract: A method for recovery after a power failure. The method generally includes a step of searching at least some of a plurality of pages of a memory to find a first erased page in response to an unsafe power down. A step may move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line. Another step may write new data starting in a subsequent word line that is the at least two word lines after the particular word line that contains the first erased page.Type: GrantFiled: October 20, 2016Date of Patent: August 14, 2018Assignee: SEAGATE TECHNOLOGY LLCInventors: Zhengang Chen, Earl T. Cohen, Alex G. Tang
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Publication number: 20170038985Abstract: A method for recovery after a power failure. The method generally includes a step of searching at least some of a plurality of pages of a memory to find a first erased page in response to an unsafe power down. A step may move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line. Another step may write new data starting in a subsequent word line that is the at least two word lines after the particular word line that contains the first erased page.Type: ApplicationFiled: October 20, 2016Publication date: February 9, 2017Inventors: Zhengang Chen, Earl T. Cohen, Alex G. Tang
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Patent number: 9552290Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.Type: GrantFiled: January 22, 2015Date of Patent: January 24, 2017Assignee: Seagate Technology LLCInventors: Leonid Baryudin, Alex G. Tang, Earl T. Cohen
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Patent number: 9478271Abstract: A method for data recovery after a power failure is disclosed. The method may include steps (A) to (D). Step (A) may determine that a last power-down of a solid-state drive was an unsafe power-down. Step (B) may search at least some of a plurality of pages of a nonvolatile memory of the solid-state drive to define an unsafe zone in response to the determining that the last power-down of the solid-state drive was the unsafe power-down. Step (C) may define a pad zone comprising one or more of the pages subsequent to the unsafe zone. Step (D) may resume operation of the solid-state drive by writing new data subsequent to the pad zone.Type: GrantFiled: April 1, 2013Date of Patent: October 25, 2016Assignee: Seagate Technology LLCInventors: Zhengang Chen, Earl T. Cohen, Alex G. Tang
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Publication number: 20160306577Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory. The controller generally includes a processor, a cache and a hardware assist circuit. The processor may be configured to initiate a recycle operation by generation of a start index. The cache may be configured to buffer a first level of a map and less than all of a second level of the map. The hardware assist circuit may be configured to search through the first level or any portions of the second level of the map in the cache in response to the start index, and notify the processor in response to the search detecting one or more blocks in the memory that contain valid data to be recycled.Type: ApplicationFiled: June 29, 2016Publication date: October 20, 2016Inventors: Timothy Canepa, Leonid Baryudin, Stephen D. Hanna, Alex G. Tang
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Patent number: 9424131Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory may comprise a plurality of memory modules each having a size less than a total size of the memory. The controller may be configured to write user data using a redundancy scheme. Information about the redundancy is (i) stored in a location separate from the data and (ii) used to recover potentially corrupted user data.Type: GrantFiled: October 3, 2013Date of Patent: August 23, 2016Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Alex G. Tang, Leonid Baryudin
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Patent number: 9411718Abstract: An apparatus includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory and configured to (i) measure a rate of free space consumption in the non-volatile memory, (ii) measure a rate of free space production in the non-volatile memory, and (iii) adjust a rate of a recycling process in response to the measured rate of free space consumption and the measured rate of free space production.Type: GrantFiled: January 17, 2013Date of Patent: August 9, 2016Assignee: Seagate Technology LLCInventors: Earl T. Cohen, Alex G. Tang, Leonid Baryudin
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Patent number: 9405672Abstract: An apparatus having a processor and a circuit is disclosed. The processor is generally configured to initiate an operation to recycle a plurality of source blocks in a memory that is nonvolatile. The circuit is generally configured to (i) search through a first of a plurality of levels in a map that defines a plurality of translations between a plurality of logical addresses used at an interface to a computer and a plurality of physical addresses used in the memory and (ii) notify the processor in response to a detection in the first level of one or more of the source blocks to be recycled that contain valid data.Type: GrantFiled: July 15, 2013Date of Patent: August 2, 2016Assignee: Seagate Technology LLCInventors: Timothy Canepa, Leonid Baryudin, Stephen D. Hanna, Alex G. Tang
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Patent number: 9213633Abstract: A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.Type: GrantFiled: May 8, 2013Date of Patent: December 15, 2015Assignee: Seagate Technology LLCInventors: Timothy L. Canepa, Earl T. Cohen, Alex G. Tang
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Patent number: 9122587Abstract: An apparatus having a nonvolatile memory and a controller. The memory stores information in multiple pages. The information includes data units and headers. Each data unit is associated with a respective identifier in an address space of the apparatus and a respective location in the memory, has a respective header having the respective identifier, and is associated with a respective time stamp. Multiple headers include ones of the time stamps. The controller is configured to (i) read information stored in the pages, (ii) determine an order in which the data units were written based on the time stamps, (iii) locate based on the order (a) each last-written occurrence of the respective identifiers and (b) the respective locations of the data units associated with the last-written occurrences, and (iv) rebuild a map of the controller according to the respective locations of each last-written occurrence of each respective identifier.Type: GrantFiled: March 12, 2013Date of Patent: September 1, 2015Assignee: Seagate Technology LLCInventors: Leonid Baryudin, Earl T. Cohen, Alex G. Tang
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Publication number: 20150134894Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.Type: ApplicationFiled: January 22, 2015Publication date: May 14, 2015Inventors: Leonid Baryudin, Alex G. Tang, Earl T. Cohen
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Publication number: 20150082124Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory may comprise a plurality of memory modules each having a size less than a total size of the memory. The controller may be configured to write user data using a redundancy scheme. Information about the redundancy is (i) stored in a location separate from the data and (ii) used to recover potentially corrupted user data.Type: ApplicationFiled: October 3, 2013Publication date: March 19, 2015Applicant: LSI CorporationInventors: Alex G. Tang, Leonid Baryudin
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Patent number: 8972776Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.Type: GrantFiled: March 7, 2013Date of Patent: March 3, 2015Assignee: Seagate Technology, LLCInventors: Leonid Baryudin, Alex G. Tang, Earl T. Cohen
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Publication number: 20140379959Abstract: An apparatus having a processor and a circuit is disclosed. The processor is generally configured to initiate an operation to recycle a plurality of source blocks in a memory that is nonvolatile. The circuit is generally configured to (i) search through a first of a plurality of levels in a map that defines a plurality of translations between a plurality of logical addresses used at an interface to a computer and a plurality of physical addresses used in the memory and (ii) notify the processor in response to a detection in the first level of one or more of the source blocks to be recycled that contain valid data.Type: ApplicationFiled: July 15, 2013Publication date: December 25, 2014Inventors: Timothy Canepa, Leonid Baryudin, Stephen D. Hanna, Alex G. Tang
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Publication number: 20140325117Abstract: A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.Type: ApplicationFiled: May 8, 2013Publication date: October 30, 2014Applicant: LSI CorporationInventors: Timothy L. Canepa, Earl T. Cohen, Alex G. Tang
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Publication number: 20140269053Abstract: A method for data recovery after a power failure is disclosed. The method may include steps (A) to (D). Step (A) may determine that a last power-down of a solid-state drive was an unsafe power-down. Step (B) may search at least some of a plurality of pages of a nonvolatile memory of the solid-state drive to define an unsafe zone in response to the determining that the last power-down of the solid-state drive was the unsafe power-down. Step (C) may define a pad zone comprising one or more of the pages subsequent to the unsafe zone. Step (D) may resume operation of the solid-state drive by writing new data subsequent to the pad zone.Type: ApplicationFiled: April 1, 2013Publication date: September 18, 2014Applicant: LSI CorporationInventors: Zhengang Chen, Earl T. Cohen, Alex G. Tang
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Publication number: 20140258769Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.Type: ApplicationFiled: March 7, 2013Publication date: September 11, 2014Applicant: LSI CORPORATIONInventors: Leonid Baryudin, Alex G. Tang, Earl T. Cohen
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Publication number: 20140258587Abstract: An apparatus having a nonvolatile memory and a controller. The memory stores information in multiple pages. The information includes data units and headers. Each data unit is associated with a respective identifier in an address space of the apparatus and a respective location in the memory, has a respective header having the respective identifier, and is associated with a respective time stamp. Multiple headers include ones of the time stamps. The controller is configured to (i) read information stored in the pages, (ii) determine an order in which the data units were written based on the time stamps, (iii) locate based on the order (a) each last-written occurrence of the respective identifiers and (b) the respective locations of the data units associated with the last-written occurrences, and (iv) rebuild a map of the controller according to the respective locations of each last-written occurrence of each respective identifier.Type: ApplicationFiled: March 12, 2013Publication date: September 11, 2014Applicant: LSI CORPORATIONInventors: Leonid Baryudin, Earl T. Cohen, Alex G. Tang
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Publication number: 20140181370Abstract: An apparatus includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory and configured to (i) measure a rate of free space consumption in the non-volatile memory, (ii) measure a rate of free space production in the non-volatile memory, and (iii) adjust a rate of a recycling process in response to the measured rate of free space consumption and the measured rate of free space production.Type: ApplicationFiled: January 17, 2013Publication date: June 26, 2014Applicant: LSI CORPORATIONInventors: Earl T. Cohen, Alex G. Tang, Leonid Baryudin