Patents by Inventor Alex Goldis

Alex Goldis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923654
    Abstract: Described herein are one or more methods for integrating an optical component into an integrated photonics device. The die including a light source, an outcoupler, or both, may be bonded to a wafer having a cavity. The die can be encapsulated using an insulating material, such as an overmold, that surrounds its edges. Another (or the same) insulating material can surround conductive posts. Portions of the die, the overmold, and optionally, the conductive posts can be removed using a grinding and polishing process to create a planar top surface. The planar top surface enables flip-chip bonding and an improved connection to a heat sink. The process can continue with forming one or more additional conductive layers and/or insulating layers and electrically connecting the p-side and n-side contacts of the laser to a source.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: March 5, 2024
    Assignee: Apple Inc.
    Inventors: Michael J. Bishop, Jason Pelc, Vijay M. Iyer, Alex Goldis
  • Patent number: 11881678
    Abstract: Configurations for a photonics assembly and the operation thereof are disclosed. The photonics assembly may include multiple photonics dies which may be arranged in an offset vertical stack. The photonics dies may emit light, and in some examples, an optical element may be a detector for monitoring properties such as the wavelength of the light. The photonics dies may be arranged in a stack as a package and the packages may be stacked or arranged side by side or both for space savings. The PIC may include combining and/or collimating optics to receive light from the photonics dies, a mirror to redirect the light, and an aperture structure. The aperture structure may include a region which is at least partially transparent such that light transmits through the transparent region of the aperture structure. The aperture structure may include an at least partially opaque region which may be used for directing and/or controlling the light launch position.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 23, 2024
    Assignee: Apple Inc.
    Inventors: Michael J. Bishop, Kwan-Yu Lai, Alex Goldis, Alfredo Bismuto, Jeffrey Thomas Hill
  • Publication number: 20220131340
    Abstract: Described herein are one or more methods for integrating an optical component into an integrated photonics device. The die including a light source, an outcoupler, or both, may be bonded to a wafer having a cavity. The die can be encapsulated using an insulating material, such as an overmold, that surrounds its edges. Another (or the same) insulating material can surround conductive posts. Portions of the die, the overmold, and optionally, the conductive posts can be removed using a grinding and polishing process to create a planar top surface. The planar top surface enables flip-chip bonding and an improved connection to a heat sink. The process can continue with forming one or more additional conductive layers and/or insulating layers and electrically connecting the p-side and n-side contacts of the laser to a source.
    Type: Application
    Filed: November 4, 2021
    Publication date: April 28, 2022
    Inventors: Michael J. Bishop, Jason Pelc, Vijay M. Iyer, Alex Goldis
  • Patent number: 11171464
    Abstract: Described herein are one or more methods for integrating an optical component into an integrated photonics device. The die including a light source, an outcoupler, or both, may be bonded to a wafer having a cavity. The die can be encapsulated using an insulating material, such as an overmold, that surrounds its edges. Another (or the same) insulating material can surround conductive posts. Portions of the die, the overmold, and optionally, the conductive posts can be removed using a grinding and polishing process to create a planar top surface. The planar top surface enables flip-chip bonding and an improved connection to a heat sink. The process can continue with forming one or more additional conductive layers and/or insulating layers and electrically connecting the p-side and n-side contacts of the laser to a source.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: November 9, 2021
    Assignee: Apple Inc.
    Inventors: Michael J. Bishop, Jason Pelc, Vijay M. Iyer, Alex Goldis