Abstract: A receiver for a data transmission system employing the interleaved binary phase shift keyed modulation technique. The received signal is demodulated by means of an in-phase reference carrier and a quadrature reference carrier both of which are supplied by a clock and carrier recovery device, thereby supplying the in-phase and quadrature components of the signal. The sign of the sum of these components and that of the difference between them are selectively gated to the output of the receiver under control of the clock signal supplied by the clock and carrier recovery device. In this device, the frequency of the received signal is doubled and the signal thus obtained is modulated by the clock signal at half the signaling rate extracted from the received signal. This modulation operation yields a signal at twice the carrier frequency from which the in-phase and quadrature reference carriers are extracted.